RRAM Option Code Circuit Using Heavy Forming for Data Retention
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Solution Overview
Problem
Conventional resistive random access memory (RRAM) cells fail to meet data retention requirements, leading to incorrect function execution and reduced system performance when used for providing option codes.
Innovation Solution
A circuit and method that utilize a controller to determine and adjust the bit number of RRAM cells through a heavy forming operation, ensuring stable resistance and data retention by identifying and operating on at least one RRAM cell that is heavy formed, thereby generating and adjusting an option code based on this bit number.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If RRAM cells are used for providing option codes, then non-volatile information storage is achieved, but data retention requirement cannot be met due to resistance variation
Solution Approach 1:
The patent applies parameter changes by performing a heavy forming operation that modifies the physical state of selected RRAM cells. This operation changes the resistance parameter of specific cells from a normal set state to a heavy formed state with significantly lower resistance, creating a distinguishable and stable parameter difference that enables reliable option code storage
Solution Approach 2:
The patent implements preliminary action by performing the heavy forming operation in advance during initialization or setup phase. The controller pre-determines which RRAM cells should be heavily formed based on the desired option code, establishing stable resistance values before the system begins normal operation, thereby ensuring data retention from the outset
2Stability of the object's composition
If heavy forming operation is performed on RRAM cells, then resistance stability is improved, but device complexity increases due to additional control operations
Solution Approach 1:
The patent applies universality by designing the controller to perform multiple functions: it manages normal read/write operations on RRAM cells, determines which cells need heavy forming based on desired option codes, executes the heavy forming operation by applying appropriate voltages, and reads the resulting option codes. This multi-functionality consolidates the complexity into a single control unit rather than requiring separate dedicated circuits
Solution Approach 2:
The patent implements self-service by having the controller autonomously determine which RRAM cells require heavy forming operations based on the desired option code configuration. The controller automatically generates the appropriate control signals and voltage patterns to perform the heavy forming operation without requiring external intervention or complex external control circuitry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Guarantees data retention and improves system performance by stabilizing the resistance of RRAM cells, ensuring accurate option code generation and execution of specific functions or applications.
Implementation Method 1
a plurality of resistive random access memory cells... the resistance of the RRAM cell which has been set or reset may be varied
Implementation Method 2
the controller performs a read operation on the resistive random access memory cells to determine a bit number
Data Source
AI summary
An option code providing circuit includes a plurality of resistive random access memory cells and a controller. The controller determines whether to provide a control signal to operate a heavy forming operation on the resistive random access memory cells or not. Wherein, the controller performs a read operation on the resistive random access memory cells to determine a bit number of the resistive random memory cell which is heavy formed, and the option code is determined by the bit number of resistive random access memory cell which is heavy formed or a bit number of the resistive random access memory cell which is not heavy formed.