Multi-Level RRAM Read Circuit Voltage Sequence

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Resistive memory cells with multi-level coding face challenges in accurately reading and distinguishing different programming states due to congestion issues with access transistors and difficulties in distinguishing current levels during reading operations.

Innovation Solution

A memory device with resistive memory cells each having a resistive element associated with a selector, implementing multi-level coding, and a reading circuit that applies a sequence of at least two successive and different reading voltages to determine the programming state based on the respective reading currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single reading voltage is applied to read multi-level data, then the reading operation is simple and fast, but it is difficult to distinguish different programming states due to current level congestion

Engineering Contradiction:
Improvereading accuracyVSAvoidreading operation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The reading operation is segmented into multiple sequential steps, each applying a different reading voltage from a predefined sequence. The current measured at each voltage level provides partial information about the programming state. By combining results from multiple voltage measurements, the system achieves accurate multi-level state discrimination without requiring complex analog-to-digital conversion circuitry.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The reading voltage parameter is dynamically changed across a sequence of predetermined values. Each voltage level in the sequence is specifically chosen to provide discriminative information about different programming states. This parameter variation enables the system to distinguish between multiple resistance levels by observing how the current response changes with voltage, thereby achieving precise state identification.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If access transistors are used in 1T-1R memory cells, then read and write operations can be controlled, but the cell size increases due to transistor congestion

Engineering Contradiction:
Improveoperation controlVSAvoidcell size
Core Design Contradiction:
Ease of operationVSArea of moving object

Solution Approach 1:

The access transistor is extracted and replaced with a selector element that has fundamentally different characteristics. The selector provides the necessary access control functionality without the size penalty of a full transistor. This extraction allows the memory cell to achieve compact dimensions while maintaining the ability to perform controlled read and write operations through voltage-based selection.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The transistor-based access control mechanism is replaced with a voltage-threshold-based selector mechanism. Instead of using a transistor's gate control to enable/disable current flow, the system uses a selector with specific voltage thresholds that naturally permit or block current based on the applied voltage. This substitution achieves similar control functionality with reduced area overhead.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If reading current is higher than programming currents, then the memory can be over-programmed, but it is difficult to distinguish memorized levels from programming levels

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidstate discrimination precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

A sequence of reading voltages is applied in a predetermined order before final state determination. Each voltage in the sequence performs a preliminary check that narrows down the possible programming states. This progressive approach allows the system to first identify the general range of the state and then refine the determination, ensuring that reading currents do not accidentally overlap with programming current levels.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from current measurements at multiple voltage levels to determine the programming state. By observing how the current response varies across the voltage sequence, the system can distinguish between programming-induced changes and naturally occurring resistance variations. The feedback mechanism enables accurate state identification even when reading currents exceed programming currents, as the pattern of responses across multiple voltages provides unique identification for each state.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution enables precise determination of programming states in resistive memory cells with multi-level coding by effectively distinguishing different current levels through a controlled sequence of reading voltages, thereby improving reading accuracy and reducing congestion issues.

Implementation Method 1

Each resistive element comprises a material capable of reversibly switching between at least one so-called 'highly resistive' state and at least one other so-called 'lowly resistive' state

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Implementation Method 2

apply a sequence of at least two successive and different reading voltages to the given cell... determining a programming state as a function of respective values of a first reading current and of a second reading current

Methodology Applied
Scientific EffectOhm's law: Ohm's Law

Data Source

PatentEP4120271B1Method for reading a multi-level rram
Publication Date: 2025.04.30 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • EP4120271B1 patent drawingFigure 1~2B
  • EP4120271B1 patent drawingFigure 3~4
  • EP4120271B1 patent drawingFigure 5~6

AI summary

Circuit and method for controlling a resistive memory formed of resistive memory cells (3) each having a resistive memory element (31, 310) associated in series with a selector (33, 330), each cell implementing a so-called "multi-level" coding and being programmed in a given programming state (3i) among k (with k > 2) possible programming states, in which during a read operation, a different sequence of read voltages (Vread1, Vread2, Vread3) is applied to the given cell and at each applied read voltage is detected whether the read current (Iread1) flowing through said given cell following the application of said read voltage corresponds to a leakage current level (loffOTS) of the selector (33) when this selector is in a blocked state or to a current level (Ilimit) when the selector is in a conducting state.