RRAM Verification Yield via Reverse Voltage Correction

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Solution Overview

Problem

The development of next-generation non-volatile memory technologies faces challenges in increasing the yield rate of resistive random access memory (RRAM) due to inefficiencies in the verification process of resistive memory cells.

Innovation Solution

The implementation of a resistive random access memory (RRAM) system that includes a resistive memory cell, a digital-to-analog converter, a decision logic, and a selection circuit, which applies a reverse voltage to the resistive memory cell during verification failures, utilizing a reference voltage and voltage pulses to enhance the verification process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional verification process is used for resistive memory cells, then verification can be performed, but the yield rate of RRAM is low due to inefficiencies in addressing verification failures

Engineering Contradiction:
Improveyield rateVSAvoidverification process efficiency
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by performing verification on resistive memory cells before finalizing the manufacturing process. The verification process includes applying verification voltages and detecting verification signals to identify cells that fail verification. Failed cells are then addressed with reverse voltages to adjust their resistance states, allowing them to pass verification and be included in the final product, thereby increasing the yield rate.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If reverse voltage is applied to resistive memory cells during verification failures, then the yield rate increases, but the device complexity increases due to additional circuits and control logic

Engineering Contradiction:
Improveyield rateVSAvoidverification circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing verification circuits that serve multiple functions. The same verification circuitry is used to both verify the resistance states of memory cells and to apply corrective reverse voltages to failed cells. This multi-functionality reduces the need for separate dedicated circuits, thereby limiting the increase in device complexity while still achieving higher yield rates through the reverse voltage application process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach increases the yield rate of RRAM by effectively determining and addressing verification failures through controlled voltage applications, thereby improving the reliability and performance of the memory cells.

Implementation Method 1

a resistive memory element and a transistor, wherein one terminal of the resistive memory element is coupled to a first terminal of the transistor

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Implementation Method 2

The decision logic is used for controlling the digital-to-analog converter to output a writing voltage to the resistive memory cell

Methodology Applied
Scientific EffectDigital-to-analog conversion:

Implementation Method 3

During a first time period and under the circumstance that the resistive memory cell fails to pass verification, the selection circuit applies a reference voltage to the other terminal of the resistive memory element and applies a voltage pulse to a second terminal of the transistor to write a reverse voltage

Methodology Applied
Scientific EffectVoltage pulse application: Electrical Resistance

Data Source

PatentUS8300449B2Resistive random access memory and verifying method thereof
Publication Date: 2012.10.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8300449B2 patent drawing
  • US8300449B2 patent drawing
  • US8300449B2 patent drawing

AI summary

A resistive random access memory (RRAM) and a verifying method thereof are provided. The RRAM comprises at least one resistive memory cell. The resistive memory cell comprises a resistive memory element and a transistor, wherein one terminal of the resistive memory element is coupled to a first terminal of the transistor. The verifying method comprises the following steps: Whether the resistive memory cell passes verification is determined. During a first time period and under the circumstance that the resistive memory cell fails to pass verification, a reference voltage is applied to the other terminal of the resistive memory element and a voltage pulse is applied to a second terminal of the transistor according to a voltage signal to write a reverse voltage to the resistive memory cell.