RRAM Array Programming Using Segmented Unipolar Pulses
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Solution Overview
Problem
Programming errors occur when transitioning a unipolar RRAM cell from a set state to a reset state in an array due to differences in current-voltage characteristics between single RRAM cells and those integrated in an array, primarily caused by intrinsic resistance from circuit elements like bitlines and selectors.
Innovation Solution
A method involving a first electric pulse to drive the RRAM cell into an unstable state, followed by a second pulse with a decaying resistor-capacitor (RC) voltage to quickly return it to a stable reset state, using a memory controller to manage the transition and prevent physical damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single electric pulse is used to program RRAM cells in an array, then the programming process is simple, but programming errors occur due to intrinsic resistance from circuit elements
Solution Approach 1:
The programming pulse is divided into two distinct segments: a first electric pulse to drive the RRAM cell into an unstable state, and a second electric pulse with decaying RC voltage to return it to a stable reset state. This segmentation allows each pulse to serve a specific function, preventing programming errors caused by intrinsic resistance while maintaining process simplicity.
Solution Approach 2:
The first electric pulse performs a preliminary action by driving the RRAM cell into an unstable state before the second pulse arrives. This preliminary state transition prepares the cell for the subsequent stable reset state, ensuring accurate programming by accounting for intrinsic resistance effects in advance.
2Reliability
If a first pulse drives the RRAM cell into an unstable state followed by a second pulse with decaying RC voltage, then programming accuracy is improved, but the programming time increases
Solution Approach 1:
The programming process uses periodic pulsed action with the first pulse followed by the second pulse with decaying RC voltage. This periodic approach ensures accurate state transition while the timing of pulses is optimized to minimize total programming time, balancing accuracy and speed.
3Productivity
If conventional programming pulses are used without accounting for intrinsic resistance, then the programming process is fast, but spurious transitions and physical damage occur
Solution Approach 1:
The invention converts the harmful effect of intrinsic resistance into a beneficial control mechanism. By using the decaying RC voltage in the second pulse, the programming process exploits the resistance characteristics to ensure stable state transition, transforming what would be a source of error into a useful feedback mechanism that prevents spurious transitions and physical damage.
Solution Approach 2:
The programming sequence incorporates feedback by using the decaying RC voltage from the second pulse to monitor and control the state transition process. This feedback mechanism ensures the RRAM cell returns to a stable reset state, preventing spurious transitions and physical damage while maintaining programming speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively programs RRAM cells from a set state to a reset state in an array while avoiding spurious transitions and physical damage, ensuring reliable data storage by accounting for the unique current-voltage characteristics of array-integrated RRAM cells.
Implementation Method 1
Such a variable resistive material layer may exhibit reversible resistance variance in accordance with a polarity and/or amplitude of an applied electric pulse
Data Source
AI summary
Subject matter disclosed herein relates to a memory device, and more particularly to programming a non-volatile memory device.