RRAM Operating Condition Optimization via Segmented Voltage Testing

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Solution Overview

Problem

Existing methods for determining optimal operating conditions for resistive random access memory (RRAM) cells are inefficient, leading to misjudgments in material testing and performance issues due to unsuitable voltage ranges during forming and initial reset operations, affecting the development and manufacturing of RRAM.

Innovation Solution

A method involving retrieving an RRAM chip, performing forming and initial reset operations, segmenting the chip into blocks, and conducting set operations with varying voltages to generate an operating characteristic curve, which determines optimal operating conditions by identifying the lowest fail bit value and suitable voltage window.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If existing methods are used to determine optimal operating conditions for RRAM, then the process is simple, but the efficiency is low and misjudgments occur in material testing

Engineering Contradiction:
Improveefficiency of determining optimal operating conditionsVSAvoidaccuracy of material testing
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The chip is segmented into multiple blocks, and each block is tested separately to obtain fail bit values. This segmentation allows for more precise local analysis of operating conditions while maintaining overall efficiency through systematic testing of divided sections.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The method uses feedback by measuring fail bit values from set operations on different blocks, then using this data to generate operating characteristic curves that indicate optimal operating conditions. This feedback loop enables accurate determination of forming and initial reset voltages while improving testing efficiency.

Inventive Principle:
Principle #23Feedback

2Reliability

If unsuitable voltage ranges are used during forming and initial reset operations, then the process is simple, but misjudgment of material-related factors occurs and performance is affected

Engineering Contradiction:
Improveperformance of RRAMVSAvoidcomplexity of determining optimal operating conditions
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The method performs preliminary testing by conducting set operations on multiple blocks with varying voltages before final RRAM operation. This preliminary action generates operating characteristic curves that identify optimal forming and initial reset voltages, ensuring reliable performance while the added complexity is confined to the initial characterization phase.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If a specific suitable voltage range is obtained for forming and initial reset operations, then the conductive filament formation is improved, but the testing and characterization process becomes more complex

Engineering Contradiction:
Improvequality of conductive filament formationVSAvoidcomplexity of voltage characterization process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The method systematically changes voltage parameters during set operations on different blocks to map out the operating characteristic curve. By varying the voltage parameter and measuring corresponding fail bit values, the method identifies optimal forming and initial reset voltages that improve conductive filament formation quality, with the characterization complexity limited to the initial parameter mapping phase.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method allows for the identification of ideal forming and initial reset voltages, ensuring the formation of conductive filaments with optimal aspects, facilitating better conductive paths and resistance state switching in RRAM cells, thus improving the reliability and performance of RRAM.

Implementation Method 1

by applying suitable voltage on the top electrode plate to perform a forming operation to memory cell, a conductive path (typically referred to as conductive filament (CF)) that passes through the dielectric material layer may be formed in the dielectric material layer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

When the conductive filament is formed, a reset operation (i.e., to make the conductive filament to break or rupture, thus causing high resistance state (HRS) to be generated on RRAM cell) can be performed thereto by applying suitable voltage on the top electrode plate

Methodology Applied
Scientific EffectElectrical resistance: Electrical Resistance

Implementation Method 3

the set operation (i.e., to form conductive filament again, thus causing low resistance state (LRS) to be generated on RRAM cell) can be performed to the RRAM cell again by applying suitable voltage on the top electrode plate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10347336B1Method for obtaining optimal operating condition of resistive random access memory
Publication Date: 2019.07.09 WINBOND ELECTRONICS CORP
  • US10347336B1 patent drawing
  • US10347336B1 patent drawing
  • US10347336B1 patent drawing

AI summary

The disclosure provides a method for obtaining optimal operating condition of a resistive random access memory (RRAM). The method includes: retrieving an RRAM chip and performing a forming operation and an initial reset operation thereto based on a first operating condition; segmenting the RRAM chip into blocks; performing a set operation to each of the blocks based on various operating voltages; obtaining a fail bit value of each of the blocks; generating an operating characteristic curve related to the RRAM chip based on the fail bit value of each of the blocks and the operating voltages, wherein the operating characteristic curve has a lowest fail bit value and an operating voltage window; and when the lowest fail bit value and the operating voltage window satisfy a first condition and a second condition, respectively, determining the first operating condition is an optimal operating condition of the RRAM chip.