RRAM Memory Cell Layout With Built-In Selector for Higher Density
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Solution Overview
Problem
The storage density of Resistive Random Access Memory (RRAM) devices is insufficient due to the large size of memory cells and the inability to achieve high-density storage, particularly with the 1T1R cell structure which limits miniaturization and 3D stacking.
Innovation Solution
A semiconductor device with a memory cell on a semiconductor substrate that includes a well area, an isolation structure, and doped areas, where the isolation structure is between the doped areas, forming a selector to control data storage without a transistor, thereby reducing the memory cell size and increasing storage density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transistor selector (1T1R cell) is used in RRAM, then data control capability is improved, but minimum cell size is increased to 6F2, reducing storage density
Solution Approach 1:
The patent extracts and removes the transistor component from the memory cell structure, transitioning from a 1T1R (one transistor one resistor) configuration to a selector-less RRAM architecture. This extraction eliminates the transistor's gate, source, and drain regions, thereby reducing the minimum cell size from 6F2 to a smaller footprint while maintaining data control through alternative mechanisms such as diode-based selectors or material interface effects
Solution Approach 2:
The patent merges the selector function with the memory cell structure by integrating diode-based selection mechanisms directly into the RRAM cell architecture. This merging eliminates the need for separate transistor components and enables compact cell designs where the selector and storage elements are combined, achieving higher storage density while preserving data control capability
2Area of stationary object
If feature size is shrunk to increase storage density, then storage capacity is improved, but manufacturing precision and device reliability become more difficult to maintain
Solution Approach 1:
The patent replaces complex mechanical transistor structures with simpler material-based selection mechanisms in RRAM devices. By using material interface effects, resistive switching, or diode-based selection instead of mechanical transistor gating, the design achieves smaller feature sizes with reduced manufacturing complexity and improved fabrication tolerance
Solution Approach 2:
The patent changes the fundamental operating parameters of the memory cell by transitioning from voltage-controlled transistor gating to material-property-based selection mechanisms. This parameter change enables scaling to smaller dimensions while maintaining device functionality, as the selection mechanism relies on material characteristics rather than precise geometric dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a semiconductor device with enhanced storage density by reducing the size of memory cells and enabling accurate data selection and reading/writing, improving the overall performance of RRAM devices.
Implementation Method 1
forming, in the well area, a first doped area, a second doped area and an isolation structure at least being located between the first doped area and the second doped area
Data Source
AI summary
A semiconductor device includes: a semiconductor substrate and a memory cell located on a surface of the semiconductor substrate; the semiconductor substrate comprises a well area, an isolation structure, a first doped area and a second doped area; the isolation structure, the first doped area and the second doped area are located in the well area, and the isolation structure at least is located between the first doped area and the second doped area; the memory cell is located on a top surface of the second doped area and is electrically connected with the second doped area.