RRAM Set-While-Verify Circuit and Sharp Corner Geometry
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing resistive random access memory (RRAM) cells require high voltage and current to form conductive filaments, which is inefficient for write operations, and there is a need for improved array architectures and circuits for performing read and write operations effectively.
Innovation Solution
The development of RRAM cells with a geometrically enhanced design featuring a resistive dielectric layer with a sharp corner between electrodes, reducing the voltage and current required for filament formation, and the implementation of set-while-verify and reset-while-verify circuits to optimize write operations, along with various array architectures for efficient read and write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional RRAM cells are used, then the memory cell structure is simple, but high voltage and current are required for filament formation
Solution Approach 1:
The patent introduces a sharp corner geometry in the resistive dielectric layer at a specific location between the electrodes. This localized geometric feature creates an enhanced electric field concentration at the sharp corner, reducing the overall voltage and current required for filament formation while maintaining a relatively simple overall cell structure.
Solution Approach 2:
The patent utilizes a sharp corner (extreme curvature) in the resistive dielectric layer to concentrate the electric field. This curved/geometric feature at a critical location enhances the local electric field strength, enabling filament formation at lower applied voltages and currents compared to conventional flat-geometry RRAM cells.
2Productivity
If high voltage and current are applied for filament formation, then the filament can be formed, but the write operation efficiency is low
Solution Approach 1:
By concentrating the electric field at the sharp corner through geometric enhancement, the patent enables more efficient filament formation with reduced energy input. This localized field enhancement directly improves write operation efficiency by achieving the same filament formation effect with lower voltage and current.
Solution Approach 2:
The patent changes the geometric parameter of the resistive dielectric layer (introducing a sharp corner) to alter the electric field distribution. This parameter change results in enhanced field concentration, which improves the efficiency of the write operation by reducing the energy required for filament formation.
3Productivity
If set-while-verify and reset-while-verify circuits are implemented, then write operations are optimized, but the circuit complexity increases
Solution Approach 1:
The patent combines the set operation and verify operation into a single integrated circuit block (set-while-verify circuit), and similarly combines reset and verify operations. This merging of functions into unified circuit modules optimizes write operations by performing both operations simultaneously, improving productivity while managing circuit complexity through functional integration.
Solution Approach 2:
The proposed circuits are designed to perform multiple functions: they can perform set operations, reset operations, and verify operations within unified circuit architectures. This multi-functionality improves write operation efficiency and reliability while avoiding the need for separate dedicated circuits for each operation, thereby managing overall circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The enhanced RRAM cell design reduces the voltage and current needed for write operations, and the proposed circuits enable efficient set and reset operations, improving the overall performance and efficiency of RRAM memory systems.
Implementation Method 1
by applying the proper voltage across the dielectric layer, a conduction path (typically referred to as a filament) can be formed through the dielectric material layer
Implementation Method 2
by providing a sharp corner in the resistive dielectric layer at a point between the two electrodes significantly reduces the voltage and current necessary to effectively form the filament
Data Source
AI summary
Numerous embodiments of circuitry for a set-while-verify operation and a reset-while verify operation for resistive random access memory cells are disclosed. In one embodiment, a set-while-verify circuit for performing a set operation on a selected RRAM cell in the array applies a combination of voltages or current to a bit line, word line, and source line associated with the selected RRAM cell and stops said applying when the set operation is complete. In another embodiment, a reset-while-verify circuit for performing a reset operation on a selected RRAM cell in the array applies a combination of voltages or current to a bit line, word line, and source line associated with the selected RRAM cell and stops said applying when the reset operation is complete.