RRAM Spacer Structure Preventing Etching Gaps

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Solution Overview

Problem

In the manufacturing of resistive random access memory (RRAM) cells, the formation of gaps between the data storage layer and spacers during the etching process can lead to weak points and poor performance due to the mismatch in materials between the upper electrode and the first spacer, causing the conductive layer to fill these gaps and affect the semiconductor device's quality.

Innovation Solution

A second spacer made of metal or metal oxide material is added outside the first spacer, providing sufficient thickness to protect the RRAM and prevent gap formation during the etching process, while a third spacer is also included to further enhance protection and alignment, ensuring the conductive layer does not fill these gaps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a first spacer is formed adjacent to the RRAM, then the RRAM structure is defined, but gaps form between the RRAM and spacer during etching due to material mismatch

Engineering Contradiction:
Improvealignment precisionVSAvoidgap formation
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies composite materials by introducing a second spacer made of metal or metal oxide material between the first spacer and the RRAM. This composite structure combines the advantages of different materials: the first spacer (dielectric material) provides electrical isolation, while the second spacer (metal/metal oxide) provides etching resistance and mechanical support, preventing gap formation during the etching process.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The second spacer acts as an intermediary element between the first spacer and the RRAM. It mediates the interaction during etching by providing a protective barrier that prevents the etching solution from creating gaps at the interface between the RRAM and the first spacer, thus solving the material mismatch problem.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the spacer structure is simplified, then the manufacturing process is easier, but the conductive layer fills gaps and affects RRAM performance

Engineering Contradiction:
Improveprocess simplicityVSAvoidgap filling control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

By using composite materials (first spacer with dielectric material and second spacer with metal/metal oxide), the structure prevents gap formation while maintaining manufacturing feasibility. The metal/metal oxide second spacer is resistant to etching and prevents conductive material from filling gaps, thus preserving RRAM performance without significantly complicating the manufacturing process.

Inventive Principle:
Principle #40Composite materials

3Reliability

If metal or metal oxide material is used for the second spacer, then etching resistance is improved, but device complexity increases

Engineering Contradiction:
Improveetching resistanceVSAvoidspacer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The spacer structure is segmented into two distinct parts: the first spacer made of dielectric material for electrical isolation, and the second spacer made of metal or metal oxide for etching resistance. This segmentation allows each component to perform its specific function optimally while keeping the overall structure manageable and not excessively complex.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11522129B2Semiconductor structure and manufacturing method thereof
Publication Date: 2022.12.06 UNITED MICROELECTRONICS CORP
  • US11522129B2 patent drawing
  • US11522129B2 patent drawing
  • US11522129B2 patent drawing

AI summary

The invention provides a semiconductor structure, the semiconductor structure includes a resistance random access memory (RRAM), a first spacer located at two sides of the RRAM, a second spacer located outside the first spacer, wherein the second spacer contains metal material or metal oxide material, and a third spacer located outside the second spacer.