RRAM Spacer Recess Structure to Prevent Resistive Layer Exposure
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Solution Overview
Problem
In resistive random access memory (RRAM) semiconductor processes, spacers are prone to over-etching, which can expose the resistive layer and cause short circuits due to the lack of adequate protection during the etching process.
Innovation Solution
A method is developed to form spacers within recesses in a dielectric layer beside the RRAM cell, where the spacers are filled into these recesses to prevent over-etching, using a dielectric layer deposition and etching process to create spaces with wider openings than bottom parts, allowing for easy filling and ensuring the resistive layer remains protected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If spacers are formed using conventional etching processes, then the manufacturing process can be completed, but the spacers are prone to over-etching which exposes the resistive layer and causes short circuits
Solution Approach 1:
A dielectric layer is deposited to blanketly cover the substrate beside the RRAM cell before the spacer formation process. This preliminary protective layer prevents the etching process from directly exposing the resistive layer, thereby avoiding short circuits while allowing the spacer formation to proceed
Solution Approach 2:
The dielectric layer serves as an intermediary protective barrier between the etching process and the resistive layer. It absorbs the harmful effect of over-etching, preventing direct contact between the etchant and the resistive layer, thus maintaining electrical isolation and preventing short circuits
2Manufacturing precision
If the dielectric layer is etched to form recesses for spacer filling, then the spacers can be properly positioned, but the resistive layer may be exposed causing short circuits
Solution Approach 1:
The dielectric layer is deposited to blanketly cover the substrate beside the RRAM cell before etching. This preliminary coverage ensures that when recesses are formed by etching, the resistive layer remains protected underneath the dielectric layer, preventing exposure and short circuits while still allowing precise spacer positioning in the recesses
Solution Approach 2:
The dielectric layer acts as an intermediary protective layer during the etching process. It allows the formation of recesses for precise spacer positioning while simultaneously protecting the resistive layer from exposure, thus resolving the contradiction between manufacturing precision and harmful effects
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents short circuits by maintaining the integrity of the resistive layer, ensuring reliable RRAM operation by avoiding spacer over-etching and maintaining the structural integrity of the RRAM cell.
Implementation Method 1
A dielectric layer is deposited to blanketly cover the substrate beside the RRAM cell
Implementation Method 2
The dielectric layer is etched to form recesses in the dielectric layer beside the RRAM cell
Data Source
AI summary
A resistive random access memory (RRAM) structure includes a RRAM cell, spacers and a dielectric layer. The RRAM cell is disposed on a substrate. The spacers are disposed beside the RRAM cell, wherein widths of top surfaces of the spacers are larger than or equal to widths of bottom surfaces of the spacers. The dielectric layer blanketly covers the substrate and sandwiches the RRAM cell, wherein the spacers are located in the dielectric layer. A method for forming said resistive random access memory (RRAM) structure is also provided.