RRAM Crossbar Array Top Electrode Inner Spacers

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Solution Overview

Problem

Resistive random access memory (RRAM) crossbar arrays face challenges in protecting their stacks within neuromorphic computing and high-density non-volatile memory applications, particularly in maintaining electrode conductivity and miniaturizing active device areas while ensuring reliable connections between pre-neurons and post-neurons.

Innovation Solution

The method involves forming conductive lines within an interlayer dielectric, depositing a metal nitride layer, forming RRAM stacks with top electrodes that have undercut regions, and filling these regions with inner spacers to create a structure that maximizes conductivity and minimizes active device area, using a combination of chemical-mechanical polishing and dielectric encapsulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the top electrode is undercut to define recesses for inner spacers, then the active device area is minimized and stacking is enabled, but the electrode conductivity may be compromised

Engineering Contradiction:
Improveactive device areaVSAvoidelectrode conductivity
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The top electrode is segmented into two parts: a first top electrode layer that maintains full coverage for conductivity, and a second top electrode layer that is undercut to create recesses. This segmentation allows the structure to simultaneously maintain electrical connectivity while enabling vertical stacking and minimizing footprint.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Inner spacers are nested within the recesses of the second top electrode layer, creating a multi-level structure. This nesting approach allows the spacers to be positioned precisely while maintaining the overall electrode integrity and conductivity through the first electrode layer.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If inner spacers are added to protect RRAM stacks, then device reliability is improved, but manufacturing complexity increases

Engineering Contradiction:
ImproveRRAM stack protectionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The inner spacers are formed preliminary to subsequent processing steps by creating recesses in the second top electrode layer. This preliminary action protects the RRAM stacks during later manufacturing steps while integrating smoothly into the overall fabrication sequence.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The inner spacers act as intermediary structures that protect the RRAM stacks from damage during manufacturing processes. These spacers serve as a buffer or mediator between the electrode structure and the RRAM stacks, preventing direct contact that could cause damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the RRAM device is scaled down to 10 nm and beyond, then memory density is increased, but maintaining reliable connections becomes more difficult

Engineering Contradiction:
Improvememory densityVSAvoidconnection reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The invention transitions from a planar structure to a three-dimensional structure by creating undercut recesses and nested spacers. This dimensional change allows connections to be maintained through vertical stacking rather than lateral scaling, enabling density improvement without sacrificing connection reliability at 10 nm and below.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The inner spacers function as thin film structures that provide protection and structural support at the nanoscale. These thin film spacers maintain connection integrity while allowing the device to be scaled to extremely small dimensions.

Inventive Principle:
Principle #30Flexible shells and thin films

Data Source

PatentUS11038104B2Resistive memory crossbar array with top electrode inner spacers
Publication Date: 2021.06.15 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11038104B2 patent drawing
  • US11038104B2 patent drawing
  • US11038104B2 patent drawing

AI summary

A method is presented for protecting resistive random access memory (RRAM) stacks within a resistive memory crossbar array. The method includes forming conductive lines within an interlayer dielectric (ILD), forming a metal nitride layer over at least one conductive line, forming a bottom electrode, forming a RRAM stack over the metal nitride layer, the RRAM stack including a first top electrode and a second top electrode, undercutting the second top electrode to define recesses, and filling the recesses with inner spacers.