RRAM Write Circuit with Current Mirror Feedback
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Solution Overview
Problem
Resistive random access memory (RRAM) cells face stress issues due to prolonged application of voltages and currents, which can lead to over-setting or over-resetting, causing data integrity and reliability concerns.
Innovation Solution
A device comprising a current mirror circuit, voltage-generating circuit, and switch circuit that generates a write voltage and current to set or reset RRAM cells, with a logic circuit to detect compliance currents and inhibit voltage application once the desired state is achieved, preventing over-stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltages and currents are applied to RRAM cells for prolonged period to set or reset, then the memory cells can be reliably programmed, but stress accumulates causing over-setting or over-resetting and data integrity issues
Solution Approach 1:
The patent implements a feedback mechanism using a current mirror circuit that continuously monitors the compliance current flowing through the RRAM cell during write operations. When the current reaches a threshold indicating the desired resistance state is achieved, the feedback signal triggers an inhibition mechanism that immediately stops further voltage application, preventing over-stress while ensuring reliable programming.
Solution Approach 2:
The RRAM cell itself provides the feedback signal for stopping the write operation. The compliance current that flows through the cell during programming serves dual purposes: it programs the cell and simultaneously triggers the inhibition mechanism when the target state is reached, eliminating the need for external sensing circuits.
2Productivity
If higher voltages and currents are applied to ensure complete setting or resetting, then programming speed improves, but the risk of over-stress and data corruption increases
Solution Approach 1:
The current mirror circuit provides real-time feedback on the compliance current magnitude, enabling the system to apply sufficient voltage for fast programming while immediately detecting when the target state is reached and preventing excessive current that would cause over-stress and data corruption.
3Reliability
If continuous monitoring is implemented to prevent over-stress, then data reliability improves, but device complexity increases due to additional circuits
Solution Approach 1:
The compliance current that is already present during normal write operations serves as the feedback signal. This self-service approach allows the RRAM cell to monitor its own state and trigger the inhibition mechanism without requiring separate sensing circuits, thereby maintaining data reliability while minimizing additional circuit complexity.
Solution Approach 2:
The patent merges the write operation and the monitoring function into a single circuit path. The same current that programs the cell also provides the feedback signal for inhibition, combining two functions that could be separate into one integrated mechanism, thus reducing overall device complexity.
Data Source
AI summary
A method for writing to a memory is disclosed. The method includes generating a write current that flows to a memory cell of the memory, generating a mirror current that mirrors the write current, and inhibiting application of a write voltage to the memory cell of the memory based on the mirror current. A device that performs the method is also disclosed. A memory that includes the device is also disclosed.