RRAM Data Writing Operation Method for Trailing Bit Resolution

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Solution Overview

Problem

In resistive random access memory (RRAM) arrays, a proportion of memory cells, known as trailing bits, fail to reach a set resistance value within a limited number of pulses, leading to degradation and errors, and requiring significantly longer operation time.

Innovation Solution

A data writing operation method for RRAM that screens out trailing bits by judging the accumulated number of pulses, and further processes them using long pulses and removing current limiting, thereby improving data retention and reducing operation time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a limited number of pulses are applied to RRAM memory cells, then the writing operation completes faster, but trailing bits fail to reach the set resistance value causing degradation and errors

Engineering Contradiction:
Improvewriting speedVSAvoiddata retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The writing operation is segmented into two distinct phases: a first writing phase using first pulse voltages with first current-limiting values, and a second writing phase using second pulse voltages with second current-limiting values. This segmentation allows the system to first attempt quick writing with standard parameters, then selectively apply enhanced parameters only to trailing bits that require additional pulses, thereby resolving the contradiction between speed and reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically changes the current-limiting value parameter based on the number of pulses applied. When the pulse count exceeds a threshold, the system switches from first current-limiting values to second current-limiting values (which are larger). This parameter change enables the system to maintain fast writing for most cells while providing additional current boost to trailing bits, simultaneously improving both writing speed and data retention

Inventive Principle:
Principle #35Parameter changes

2Reliability

If additional pulses are applied to trailing bits to reach the set resistance value, then data retention improves, but the operation time increases significantly

Engineering Contradiction:
Improvedata retentionVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by setting a pulse count threshold before the writing operation begins. During the writing process, the system monitors the pulse count and automatically switches to the second writing phase with larger current-limiting values when the threshold is exceeded. This preliminary setup allows the system to quickly identify and address trailing bits without significantly extending the overall operation time, as the transition to enhanced parameters is automatic and pre-planned

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial action by using larger second current-limiting values only for trailing bits that require additional pulses, rather than applying enhanced parameters to all memory cells. This selective application of excessive current ensures that trailing bits receive the additional attention needed for reliable data retention, while the majority of cells that reached their target resistance value earlier continue to operate with standard parameters, thus minimizing the overall time loss

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively improves data retention characteristics and saves operation time, leading to enhanced writing efficiency by addressing the issues of trailing bits and degradation in RRAM arrays.

Implementation Method 1

When a constant voltage is applied to the word line (WL), a driving signal is applied to the bit line (BL), and the source line (SL) is grounded, the state of the RRAM changes from a high resistance state to a low resistance state

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20250054544A1Data writing operation method and device for resistive random access memory
Publication Date: 2025.02.13 XIAMEN IND TECH RES INST CO LTD
  • US20250054544A1 patent drawing
  • US20250054544A1 patent drawing
  • US20250054544A1 patent drawing

AI summary

The disclosure discloses a data writing operation method and device of a resistive random access memory, and the method includes: applying a first pulse voltage to the resistive random access memory, and adding one to a corresponding number to obtain a first number; if the current first number is greater than a first set upper limit value and a current second number is smaller than or equal to a second set upper limit value, obtaining a test value; if the test value does not satisfy a preset condition, applying a second pulse voltage to the resistive random access memory, and adding one to the corresponding number to obtain a second number until the test value satisfies the preset condition or the current second number is greater than the second set upper limit value, thereby improving the writing efficiency.