RS BCH Decoder Using Composite Field Lookup Tables
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Reed-Solomon (RS) and Bose-Chaudhuri-Hocquenghem (BCH) code decoders face challenges in efficiently correcting errors at high data rates due to iterative procedures that are not amenable to parallelization, limiting their performance in modern communication channels.
Innovation Solution
The development of circuits and methods that include a syndrome calculator, a location finder, and an error corrector, utilizing a composite field to simplify error location polynomial factorization and employing lookup tables to efficiently determine polynomial roots, allowing for fast error correction in RS or BCH encoded bit streams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If iterative decoding procedures are used for RS and BCH codes, then error correction capability is achieved, but decoding speed and parallelization capability deteriorate
Solution Approach 1:
The patent segments the decoding process into distinct functional blocks: syndrome calculator, error locator polynomial generator, root finder, and error corrector. Each block performs a specific operation that can be independently implemented and optimized, enabling parallel processing while maintaining the complete error correction functionality.
Solution Approach 2:
The patent pre-computes and stores lookup tables for polynomial root finding operations. By preparing these tables in advance, the decoder avoids performing complex iterative calculations during actual decoding, significantly speeding up the process while maintaining accuracy.
2Measurement precision
If complex polynomial factorization is performed to find error locations, then accurate error correction is achieved, but computational complexity and power consumption increase
Solution Approach 1:
The patent pre-computes polynomial root values and stores them in lookup tables before decoding operations. This eliminates the need for real-time complex polynomial factorization, reducing power consumption while maintaining accurate error location determination through simple table lookups.
Solution Approach 2:
The patent uses lookup tables that contain pre-calculated polynomial root values. Instead of performing complex mathematical operations during decoding, the system copies pre-computed results from the lookup tables, significantly reducing computational energy requirements while preserving accuracy.
3Productivity
If lookup tables are used to store polynomial root values, then decoding speed is improved, but memory requirements increase
Solution Approach 1:
The patent segments the lookup table into multiple smaller tables, each storing root values for specific polynomial degrees or error scenarios. This segmentation reduces the memory footprint of each individual table while maintaining the ability to quickly retrieve necessary values through organized access patterns.
Solution Approach 2:
The patent implements different lookup table structures optimized for specific error conditions or polynomial degrees. Each table is locally optimized for its specific purpose, using only the memory space necessary for that particular function, thereby reducing overall memory requirements while maintaining fast access speeds.
Data Source
AI summary
An illustrative decoder includes: a syndrome calculator, a location finder, and an error corrector. The syndrome calculator has an array of logic gates to obtain syndrome values as a product of a receive message vector and a parity check matrix, the syndrome values including at least a three ten-bit syndrome values S1, S2, and S3. The location finder derives a number of errors from the syndrome values, and uses a second array of logic gates to obtain two polynomial roots as a product of a syndrome value vector and a quadratic solution matrix when the number of errors is two, the quadratic solution matrix corresponding to a determination of a quadratic equation's trailing coefficient value s, a determination of the quadratic equation's roots, and a reversal of a variable substitution. The location finder further determines a bit index for each of the polynomial roots.