Pipelined Reed-Solomon Decoder With Threshold-Guided List Decoding

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Reed-Solomon error-correction codes (RS ECC) face challenges in modern applications due to their complex encoding and decoding processes, which can be time and resource-intensive, limiting their suitability in devices with stringent time, power, and hardware resource constraints.

Innovation Solution

The implementation of a hard RS ECC decoder capable of correcting up to t=(n−k)/2 erroneous symbols, with an option for a soft decoder to correct more errors using soft-information, incorporating a pipelined architecture with stages for error indicator production, list decoding, and error evaluation, and a threshold-based control circuit to optimize resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Reed-Solomon ECC encoding and decoding is implemented to ensure information integrity, then error correction capability is improved, but processing time and hardware resource consumption increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The decoding process is divided into multiple pipeline stages that operate concurrently. Each stage handles a specific aspect of the decoding process (e.g., syndrome computation, error location, error correction), allowing parallel processing and reducing overall processing time while maintaining error correction capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system pre-computes and stores lookup tables for error correction operations during initialization. These pre-computed values are then rapidly retrieved during actual decoding operations, significantly reducing processing time without sacrificing correction accuracy.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If Reed-Solomon ECC encoding and decoding is implemented to ensure information integrity, then error correction capability is improved, but hardware resource consumption increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidhardware resource consumption
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The decoder architecture is designed to handle multiple RS code configurations (different values of n and k) using the same hardware resources. The pipeline stages and lookup tables are configured to work with various code rates, eliminating the need for separate hardware implementations for each code configuration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses pre-computed lookup tables that store results of complex mathematical operations. These tables are generated once and copied into memory, replacing the need for repeated complex computations during decoding, thus reducing hardware resource requirements.

Inventive Principle:
Principle #26Copying

3Reliability

If soft-information is used to correct more than t errors, then error correction capability is improved, but processing complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The decoder dynamically selects between hard-decision and soft-decision decoding modes based on the error conditions detected in the received data. When error patterns suggest soft-decision decoding would be beneficial, the system activates the additional processing paths; otherwise, it operates in the simpler hard-decision mode.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system introduces an intermediate processing stage that evaluates whether soft-information processing is necessary before committing to the more complex decoding path. This intermediary assessment allows the system to avoid unnecessary complexity when hard-decision decoding suffices.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7444582B1Architecture and control of reed-solomon error-correction decoding
Publication Date: 2008.10.28 MARVELL ASIA PTE LTD
  • US7444582B1 patent drawing
  • US7444582B1 patent drawing
  • US7444582B1 patent drawing

AI summary

Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed.