RTC Anti-Rollback Protection via Checkpoint Validation

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Solution Overview

Problem

Existing Real-Time Clock (RTC) systems in System-On-Chip (SoC) devices are vulnerable to tampering through 'rollback' attacks, where the time is set to a past date, compromising security policies and software revisions that rely on an increasing time.

Innovation Solution

An application-specific integrated circuit (ASIC) with an integrated anti-rollback protection mechanism, featuring a Real-Time Clock (RTC) block, a checkpoint memory block, and set RTC logic, which only allows updates to new dates and times if they are in the future relative to a stored active date/time checkpoint, using non-volatile memory to maintain checkpoints even when power is interrupted.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the RTC allows time to be set freely, then the ease of operation is improved, but the security against rollback attacks deteriorates

Engineering Contradiction:
Improveease of setting timeVSAvoidsecurity against rollback attacks
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements a checkpoint mechanism that records the current RTC time before allowing any time setting operation. This preliminary action creates a reference point that prevents future rollback attacks, as any attempt to set the time to a previous value can be detected and rejected.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors the RTC time and compares it against stored checkpoints. When a time setting attempt is made, the system provides feedback by validating whether the new time is greater than the checkpoint time, thereby preventing rollback attacks while allowing legitimate forward time adjustments.

Inventive Principle:
Principle #23Feedback

2Reliability

If the RTC maintains continuous operation with battery backup, then the reliability is improved, but the vulnerability to tampering during power interruptions worsens

Engineering Contradiction:
Improvecontinuous time maintenanceVSAvoidtampering during power interruptions
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a checkpoint memory block as an intermediary component that stores reference time values in non-volatile memory. This intermediary preserves critical time information even when power is interrupted, allowing the system to detect and prevent tampering attempts after power restoration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system uses disposable one-time programmable (OTP) memory or fuse-based storage for checkpoint data. These non-volatile, single-write memory locations provide permanent, tamper-resistant storage of checkpoint values that cannot be modified once written, ensuring security even during power interruptions.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Reliability

If the system implements checkpoint validation logic, then the security against rollback attacks is improved, but the device complexity increases

Engineering Contradiction:
Improveanti-rollback protectionVSAvoidlogic block structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the RTC system into distinct functional blocks: an RTC block for timekeeping, a checkpoint memory block for storing reference values, and a set RTC logic block for validation. This segmentation allows each component to perform its specific function efficiently while maintaining overall system security through modular design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11636199B2Real time clock with integrated anti-rollback protection
Publication Date: 2023.04.25 REALTEK SINGAPORE PTE LTD
  • US11636199B2 patent drawing
  • US11636199B2 patent drawing
  • US11636199B2 patent drawing

AI summary

A Real-Time Clock (RTC) block configured to output a current time as part of an ASIC configuration that guarantees that the RTC can never be rolled back beyond a checkpointed date and time. A checkpoint memory block is coupled to the RTC block and configured to include a stored active date/time checkpoint, and a set RTC logic block is coupled to the checkpoint memory block and to the RTC block and configured to permit setting the RTC block to an asserted new time request only when the asserted new time is in the future relative to the stored active date/time checkpoint. The active date/time checkpoint is stored in a non-volatile, single-write memory location such as in a one-time programmable (OTP) memory or in a bank of fuses so that the stored active date/time checkpoint is maintained whether or not power is interrupted to the checkpoint memory block.