Real-Time Clock Reset Circuit for Low-Voltage Power-On Initialization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing power-on reset circuits in circuit devices struggle to operate effectively when the main power supply voltage is low, particularly in systems aiming for low power consumption or when initialized using a backup power supply, leading to inadequate reset signal generation.

Innovation Solution

A circuit device configuration that includes a power supply circuit to select between a first and second power supply voltage, generating a third power supply voltage, and utilizes both a first and second power-on reset circuit to ensure appropriate reset signal output, even when the main power supply voltage is insufficient, through a reset control circuit that sets the third power-on reset signal to a release level when both first and second signals reach a reset release level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the main power supply voltage is set low to achieve low power consumption, then power consumption is reduced, but the power-on reset circuit cannot operate appropriately

Engineering Contradiction:
Improvepower consumptionVSAvoidreset circuit operation
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The power-on reset circuit is divided into two independent circuits: a first power-on reset circuit that operates based on the first power supply voltage (main power supply) and a second power-on reset circuit that operates based on the third power supply voltage (generated by power supply circuit). Each circuit can independently generate reset signals, allowing the system to maintain reliable reset functionality even when the main power supply voltage is too low to operate the first circuit alone.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A power supply circuit acts as an intermediary between the first power supply voltage and the second power-on reset circuit. This power supply circuit generates a third power supply voltage from the first power supply voltage, enabling the second power-on reset circuit to operate even when the first power supply voltage is insufficient. The reset control circuit then combines signals from both power-on reset circuits to produce the final reset signal.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If a single power-on reset circuit is used to simplify the device structure, then device complexity is reduced, but reset functionality fails when main power supply voltage is insufficient

Engineering Contradiction:
Improvereset circuit structureVSAvoidreset signal generation
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The reset circuit is segmented into multiple functional blocks: a first power-on reset circuit for high-voltage operation, a power supply circuit for voltage conversion, a second power-on reset circuit for low-voltage operation, and a reset control circuit for signal integration. This segmentation allows each block to be optimized for its specific function while working together to provide comprehensive reset coverage across different power supply conditions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The power supply circuit serves multiple functions: it generates the third power supply voltage for the second power-on reset circuit, and its operation status is used by the reset control circuit to determine when to release the reset signal. The reset control circuit also performs multiple functions by monitoring both power-on reset circuits and coordinating their outputs to ensure proper system initialization under various power conditions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11836001B2Circuit device and real-time clock device
Publication Date: 2023.12.05 SEIKO EPSON CORP
  • US11836001B2 patent drawing
  • US11836001B2 patent drawing
  • US11836001B2 patent drawing

AI summary

A circuit device includes a first power supply line to which a first power supply voltage is supplied, a second power supply line to which a second power supply voltage is supplied, a third power supply line, a power supply circuit, a predetermined circuit, a first power-on reset circuit, a second power-on reset circuit, and a reset control circuit. When a first power-on reset signal and a second power-on reset signal become a reset release level, the reset control circuit sets a third power-on reset signal output to at least a part of the predetermined circuit to a reset release level.