RTC Time Synchronization for Chipset Failover
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Solution Overview
Problem
Existing information processing apparatuses face challenges in synchronizing the system time between operational and backup chipsets when a failure occurs, leading to incorrect system time and operational issues.
Innovation Solution
An information processing apparatus with a first Real Time Clock (RTC) on the operational chipset, a second RTC on the backup chipset, and a third RTC for system time management, which calculates and sets a temporary system time on the backup chipset using the difference time stored during normal operation, ensuring synchronization upon switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the system uses a backup chipset to prevent system disable state, then the system availability is improved, but the system time becomes incorrect because the backup chipset RTC is not synchronized with the operational chipset RTC
Solution Approach 1:
The patent calculates and stores the time difference between the operational chipset RTC and the backup chipset RTC before a failure occurs. When switching to the backup chipset, this pre-calculated time difference is applied to synchronize the backup RTC with the system time, eliminating the need for post-switching synchronization and ensuring time accuracy is maintained throughout the failover process
Solution Approach 2:
The patent implements a feedback mechanism where the time difference between operational and backup RTCs is continuously monitored and calculated. This feedback information is stored and used to adjust the backup RTC timing, ensuring that when the backup chipset becomes operational, its time is already synchronized with the system time through application of the stored time difference
2Duration of action of stationary object
If the system switches from operational chipset to backup chipset, then the system continuity is maintained, but manual time synchronization is required which increases operational complexity
Solution Approach 1:
The patent enables the backup chipset RTC to self-synchronize by automatically applying the pre-stored time difference when the backup chipset becomes operational. This self-service mechanism eliminates the need for manual intervention to synchronize time after a chipset failure, reducing operational complexity while maintaining system continuity
3Measurement precision
If the system stores the time difference between operational and backup RTC, then the time synchronization accuracy is improved, but the device complexity increases due to additional storage and calculation components
Solution Approach 1:
The patent extracts only the essential time difference value between the operational and backup RTCs and stores it in a dedicated storage unit. This extraction approach focuses on storing only the critical synchronization parameter rather than maintaining complex synchronization protocols, achieving high time synchronization accuracy with minimal additional device complexity
Data Source
AI summary
The time in the chipset of backup resources is synchronized easily at the system time.An information processing apparatus including: an operational chipset which includes a first Real Time Clock (RTC); a backup chipset which includes a second RTC: a third RTC which times system time; a difference time calculation unit which calculates a difference time between a system time periodically notified of from the first RTC of the operational chipset and the system time which the third RTC times; a holding unit which holds the difference time; a calculation unit which calculates a temporary system time which is set to the second RTC of the backup chipset to which a chipset switching operated, based on the system time of the third RTC and the difference time at the time of the chipset switching; and a configuration unit which sets the temporary system time to the second RTC of the backup chipset.