RTL Vector Glitch Power Analysis Using STA Delay Shifts
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Solution Overview
Problem
Existing digital simulation tools for pre-silicon power consumption estimation in IC devices inaccurately model glitch power, leading to significant discrepancies between pre-silicon and post-fabrication power measurements, resulting in either optimistic or pessimistic power consumption estimates that fail to meet design constraints and increase manufacturing costs.
Innovation Solution
Perform glitch power analysis using Register Transfer Level (RTL) vectors and static timing analysis (STA) timing data to simulate signal delays and propagate glitches, calculating power consumption based on pulse width and slew, enabling early detection and accurate power estimation without requiring additional input data or multiple simulations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional power analysis methods are used, then implementation simplicity is maintained, but measurement precision and reliability are insufficient due to inability to distinguish glitch correlations from normal switching activity
Solution Approach 1:
The patent segments the power consumption signal into distinct components: normal switching activity and glitch-induced activity. By separating these components through vector-based analysis and statistical processing, the system can precisely measure glitch correlations without being overwhelmed by the complexity of the full signal, thus improving measurement precision while managing device complexity.
Solution Approach 2:
The patent introduces intermediary elements including vector representations of power traces, statistical models, and correlation analysis mechanisms. These intermediaries transform the raw power consumption data into processed features that reveal glitch patterns, enabling precise measurement without directly confronting the full complexity of the original signal.
2Reliability
If power consumption measurements are taken during glitch events, then glitch detection capability is improved, but reliability deteriorates due to difficulty in distinguishing glitch correlations from normal switching activity
Solution Approach 1:
The patent implements feedback mechanisms through iterative correlation analysis and statistical validation. The system continuously refines its detection by comparing measured power traces against expected glitch patterns, adjusting its analysis based on the degree of correlation observed. This feedback loop improves reliability by systematically distinguishing genuine glitch signals from normal switching activity.
Solution Approach 2:
The patent performs preliminary actions by pre-characterizing the device's normal power consumption patterns and establishing baseline models before attempting glitch detection. This preliminary characterization enables the system to reliably identify deviations from normal behavior, improving detection reliability while reducing the difficulty of measuring glitch events.
3Measurement precision
If detailed power analysis is performed to improve glitch detection accuracy, then measurement precision is improved, but loss of time increases due to complex analysis requirements
Solution Approach 1:
The patent applies partial action by focusing analysis only on the specific portions of power traces that contain glitch-related information. Rather than performing exhaustive analysis on the entire power consumption signal, the system selectively extracts and analyzes relevant features, achieving high measurement precision while minimizing the time loss associated with unnecessary computational overhead.
Data Source
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AI summary
A method includes acquiring a vector data signal associated with a circuit design, performing a timing update to determine timing information for the circuit design, and identifying a glitch in the circuit design based on a shifted vector waveform. The timing information includes a signal delay associated with a cell of the circuit design. The shifted vector waveform is generated by shifting the vector data signal based on the timing information.