RTL Kernel Integration in Programmable ICs

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Solution Overview

Problem

Incorporating programmable integrated circuits (ICs) into heterogeneous multiprocessor designs is challenging due to the static architecture of devices like GPUs and DSPs, which limits their ability to interact with programmable ICs such as FPGAs within a heterogeneous computing environment.

Innovation Solution

A method is developed to generate a register transfer level (RTL) description of a kernel, integrate it with a base platform circuit design within a programmable IC, and create a configuration bitstream to implement the kernel as hardware, enabling interaction with the host system and supporting data within a binary container.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a programmable IC is used to provide hardware acceleration in a heterogeneous multiprocessor design, then processing performance and flexibility are improved, but the complexity of integrating the programmable IC with the host system increases

Engineering Contradiction:
Improveprocessing performanceVSAvoidintegration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary integration layer that includes interface circuits and control logic to bridge the programmable IC and the host system. This intermediary structure manages the interaction between the heterogeneous components, handling data transfer, synchronization, and control signals, thereby reducing the overall integration complexity while enabling hardware acceleration

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent designs the programmable IC with universal interface capabilities that can interact with multiple types of host systems and support various kernel implementations. The integration architecture provides multi-functional interfaces that can handle different data formats, communication protocols, and control mechanisms, making the system more adaptable and easier to integrate

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If a static architecture device like GPU or DSP is used, then the device structure is simplified, but the ability to interact with programmable ICs and adapt to different computing tasks is limited

Engineering Contradiction:
Improvedevice structureVSAvoidinteraction capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic configurability in the programmable IC, allowing its hardware architecture to be reconfigured at runtime to adapt to different computing tasks. The device can dynamically load different kernel bitstreams, change its operational mode, and adjust its resource allocation based on the specific computational requirements, providing both structural simplicity and high adaptability

Inventive Principle:
Principle #15Dynamics

3Stability of the object's composition

If kernels are implemented as software on traditional devices, then the system architecture remains static, but hardware acceleration and performance enhancement are not achieved

Engineering Contradiction:
Improvesystem architecture stabilityVSAvoidprocessing performance
Core Design Contradiction:
Stability of the object's compositionVSProductivity

Solution Approach 1:

The patent enables parameter changes in the programmable IC by allowing dynamic modification of hardware configuration parameters through kernel bitstream loading. The device can change its operational parameters, resource allocation, and circuit configuration to optimize processing performance for different kernels while maintaining a stable overall system architecture

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9218443B1Heterogeneous multiprocessor program compilation targeting programmable integrated circuits
Publication Date: 2015.12.22 XILINX INC
  • US9218443B1 patent drawing
  • US9218443B1 patent drawing
  • US9218443B1 patent drawing

AI summary

OpenCL program compilation may include generating, using a processor, a register transfer level (RTL) description of a first kernel of a heterogeneous, multiprocessor design and integrating the RTL description of the first kernel with a base platform circuit design. The base platform circuit design provides a static interface within a programmable integrated circuit to a host of the heterogeneous, multiprocessor design. A first configuration bitstream may be generated from the RTL description of the first kernel using the processor. The first configuration bitstream specifies a hardware implementation of the first kernel and supporting data for the configuration bitstream. The first configuration bitstream and the supporting data may be included within a binary container.