RTL Sub-circuit Placement and Routing Predictability
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Solution Overview
Problem
Achieving predictability in the performance of intellectual property cores within programmable integrated circuits is challenging due to stringent performance requirements and the complexity of modern ICs, which often results in manual and time-consuming design processes that vary across different architectures.
Innovation Solution
Implementing a computer-implemented method that uses implementation directives embedded in RTL descriptions to prioritize the placement and routing of sub-circuits, such as IP cores, within programmable ICs, ensuring specific operational characteristics like delay and skew requirements are met, while optimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If automated place and route tools are used to implement IP cores, then productivity is improved, but manufacturing precision deteriorates due to inability to guarantee specific operational characteristics
Solution Approach 1:
The patent applies preliminary action by embedding implementation directives in the RTL description before the place and route process. These directives pre-specify operational characteristics (delay, skew, power) that the automated tool must honor during placement and routing, ensuring predictability is built into the design from the outset rather than requiring manual adjustment afterward.
Solution Approach 2:
The patent changes parameters by introducing implementation directives that modify how the automated place and route tool operates. Instead of using default optimization criteria, the tool receives constrained parameters (maximum delay, maximum skew, power requirements) that guide the placement and routing algorithms to produce results meeting specific operational characteristics while still using automated processing.
2Manufacturing precision
If manual placement and routing is performed to meet specific operational characteristics, then manufacturing precision is improved, but productivity deteriorates due to increased time and complexity
Solution Approach 1:
The patent applies self-service by enabling the automated place and route tool to handle the complexity of meeting operational characteristics independently. The implementation directives provide the tool with the necessary constraints, and the tool's algorithms automatically generate placement and routing solutions that satisfy these constraints, eliminating the need for manual intervention while maintaining precision.
3Adaptability or versatility
If different IC architectures are used to implement the same circuit design, then adaptability is improved, but manufacturing precision deteriorates due to varying performance across architectures
Solution Approach 1:
The patent applies local quality by making the implementation directives architecture-specific. Different IC architectures can have different implementation directives embedded in their respective RTL descriptions, allowing each architecture to optimize for its specific characteristics while still guaranteeing the required operational characteristics. This enables tailored implementation for each architecture type.
4Manufacturing precision
If stringent performance requirements are imposed on IP cores, then manufacturing precision is improved, but device complexity increases due to additional constraints on placement and routing
Solution Approach 1:
The patent introduces implementation directives as an intermediary between the performance requirements and the place and route tool. Rather than directly complicating the placement and routing processes, the directives serve as a intermediary layer that translates high-level performance requirements into constraints that the automated tool can handle systematically, reducing the perceived complexity for the designer.
Data Source
AI summary
A method of implementing a circuit design within a programmable integrated circuit (IC) can include identifying an implementation directive embedded within a register transfer level (RTL) description of the circuit design and determining components of a sub-circuit of the circuit design, wherein the sub-circuit is specified by a portion of the RTL description associated with the implementation directive. The sub-circuit can be placed for the programmable IC and routed for the programmable IC according to the implementation directive. A programmatic description of the sub-circuit specifying placement and routing information can be output.


