RTO DAC Feedback Bypass for Faster ADC Reset Linearity
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Solution Overview
Problem
Conventional RTO DACs in analog to digital converters suffer from residual data dependency due to slow discharge or charge of parasitic capacitance during the reset phase, leading to inter symbol interference and non-linearity, while RTZ DACs are complex and less power efficient.
Innovation Solution
Implementing a feedback circuit with a resistive bypass circuit that quickly adjusts the charge on parasitic capacitance during the reset phase using a lower resistance path, reducing data dependency and shortening the reset phase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional RTO DAC is used in the feedback circuit, then the circuit complexity is reduced and power consumption is lowered, but residual data dependency occurs due to slow charge/discharge of parasitic capacitance during reset phase
Solution Approach 1:
The feedback circuit is segmented into two distinct paths: a high-value resistive path for normal operation and a low-value resistive path for reset phase. This segmentation allows each path to be optimized for its specific function - the high-value path minimizes power consumption during data phase, while the low-value path quickly discharges parasitic capacitance during reset phase, eliminating residual data dependency.
Solution Approach 2:
The feedback circuit dynamically switches between two resistance states based on the operational phase. During the data phase, the circuit operates in high-impedance mode to save power. During the reset phase, it transitions to low-impedance mode to rapidly discharge parasitic capacitance. This dynamic switching resolves the contradiction by adapting the circuit characteristics to the immediate operational requirements.
2Reliability
If the reset phase duration is extended to fully discharge parasitic capacitance in conventional RTO DAC, then data dependency is reduced, but the data phase time is reduced and overall conversion speed is limited
Solution Approach 1:
The resistance value in the feedback path is changed based on the operational phase. During reset phase, a low resistance value is applied to enable rapid discharge of parasitic capacitance, achieving reliable clearing of residual data in a short time. During data phase, a high resistance value is applied to minimize power consumption. This parameter change allows the reset phase to be completed quickly without compromising discharge effectiveness.
Solution Approach 2:
The feedback circuit operates in periodic cycles, alternating between data phase and reset phase. The brief reset phase uses low resistance to quickly discharge parasitic capacitance, then the circuit transitions to data phase with high resistance for normal conversion. This periodic switching between resistance states enables rapid reset without extending the overall conversion cycle, maintaining high productivity.
3Measurement precision
If a RTZ DAC is used instead of RTO DAC to eliminate residual data dependency, then gain linearity is improved, but circuit complexity increases and power efficiency decreases
Solution Approach 1:
The invention extracts and addresses only the specific problem of residual data dependency during reset phase, rather than implementing a complete RTZ DAC architecture. By adding a simple low-value parallel path that activates only during reset phase, the solution removes the harmful residual charge without requiring the complex reference voltage generation and full reset circuitry of a RTZ DAC, thus maintaining power efficiency.
Solution Approach 2:
The circuit implements different resistance characteristics in different operational phases rather than using a uniformly low resistance path throughout. During data phase, the high-value path dominates to minimize power consumption. During reset phase, the low-value path activates locally to discharge parasitic capacitance. This local quality differentiation achieves RTZ-like performance only when needed, without the continuous power penalty of a full RTZ implementation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances ADC performance by minimizing inter symbol interference and reducing circuit complexity and power consumption, achieving improved gain linearity and efficiency.
Implementation Method 1
charge stored on the parasitic capacitance of the feedback circuit
Implementation Method 2
lower resistance bypass circuit
Data Source
AI summary
An analog to digital circuit that includes a feedback circuit with a return to open (RTO), digital to analog converter (DAC) that provides an analog signal that is indicative of an output of an ADC component of the ADC. During a data phase, the output of the DAC is provided to a combiner input through a resistive circuit. The combiner also receives an analog input signal at another input and provides a combined output signal to the ADC component. During a reset phase, the output of the DAC is provided to the combiner through a lower resistance bypass circuit to bypass the resistive circuit.