Rugged Power FET Structure Preventing Parasitic BJT Activation

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Solution Overview

Problem

Power semiconductor field effect transistors suffer from failures due to the activation of parasitic BJT under transient conditions, such as avalanche operations and cosmic radiation, which cannot be entirely eliminated in existing VDMOS structures.

Innovation Solution

A rugged power semiconductor field effect transistor structure is designed without a parasitic BJT, featuring specific doping concentrations and regions, a gate-controlled channel, and trench gate dielectric placement to prevent parasitic BJT activation, ensuring immunity to failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the conventional VDMOS structure with n+ source, p-type body region and n- drift region is used, then the device can conduct current in on-state and block current in off-state, but the parasitic BJT is inevitably formed and can be activated under transient conditions causing device failures

Engineering Contradiction:
Improvedevice reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the p-type body region from the conventional VDMOS structure, eliminating the parasitic BJT formation. The n+ source region is directly placed on the n- drift region without a p-type body layer, thereby taking out the harmful element that causes second breakdown while preserving the essential FET operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the doping parameter configuration by eliminating the p-type body region entirely and adjusting the n+ source and n- drift region doping profiles. This parameter change transforms the structure from one that forms a parasitic BJT to one that does not, while maintaining the necessary electrical characteristics for reliable operation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the parasitic BJT suppression measures are taken in conventional VDMOS, then some failure modes are reduced, but the parasitic BJT cannot be entirely eliminated and failures can still occur under extreme transient conditions

Engineering Contradiction:
Improveimmunity to transient failuresVSAvoidparasitic BJT activation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful parasitic BJT effect into a benefit by completely eliminating the p-type body region that creates the parasitic structure. This structural modification transforms the device into one that is inherently immune to second breakdown, turning the previously harmful transient response into a robust failure-free operation under all conditions including avalanche and cosmic radiation events.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The structure effectively prevents parasitic BJT activation, enhancing the device's ruggedness and immunity to transient-related failures, thereby improving reliability in power electronic systems.

Implementation Method 1

a gate dielectric is provided at the top of the lightly doped drift region of the first conductivity type and the heavily doped source region of the second conductivity type, which covers above the lightly doped drift region of the first conductivity type and part of the top of the heavily doped source region of the second conductivity type, a gate electrode is provided at the top of the gate dielectric

Methodology Applied
Scientific EffectElectric Field Effect: Electric Field

Data Source

PatentUS11004935B2Solid power semiconductor field effect transistor structure
Publication Date: 2021.05.11 JSAB TECH (SHENZHEN) LTD
  • US11004935B2 patent drawing
  • US11004935B2 patent drawing
  • US11004935B2 patent drawing

AI summary

The present invention discloses a rugged power semiconductor field effect transistor structure, and through a special design, it solves the problem that the activation under a transient condition may result in failures on the device, so that there is no parasitic BJT, and thus the device is more rugged.