Running disparity predictor for flexible 8B/10B encoding
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Solution Overview
Problem
Built-in 8B/10B encoders in Hard IP blocks are inflexible and cannot support protocols like Fibre Channel that require dynamic control logic to switch terminators based on running disparity, leading to the need for separate encoders and increased logic gate usage.
Innovation Solution
A running disparity computation predictor is used to predict the resultant running disparity from unencoded input data, allowing for the selection of correct control words and insertion of end-of-frame terminators within the transmission pipeline, utilizing lookup tables and exclusive-OR operations to efficiently calculate toggle values without full 8B/10B encoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If built-in 8B/10B encoders in Hard IP blocks are used, then encoding functionality is provided, but flexibility to dynamically switch terminators based on running disparity is lost
Solution Approach 1:
The encoder is divided into two separate functional blocks: a running disparity computation block that calculates disparity values, and a built-in 8B/10B encoder that performs encoding. This segmentation allows the computation block to provide flexible disparity control while the encoder block handles the actual encoding, resolving the contradiction between flexibility and complexity.
Solution Approach 2:
A running disparity computation block is introduced as an intermediary component between the data source and the built-in 8B/10B encoder. This intermediary computes the running disparity and provides control signals to the encoder, enabling dynamic terminator switching without requiring the encoder itself to be complex or reconfigurable.
2Adaptability or versatility
If separate 8B/10B encoders are implemented to support dynamic control, then protocol flexibility is achieved, but logic gate usage and cost increase
Solution Approach 1:
The built-in 8B/10B encoder is enhanced to accept external running disparity control signals from a separate computation block. This allows the existing encoder resource to serve multiple protocol requirements dynamically through control signals, rather than requiring separate dedicated encoders for each protocol, thus reducing logic gate usage while maintaining flexibility.
Solution Approach 2:
The built-in 8B/10B encoder is designed to support multiple protocols and terminator types through external control, making it a universal encoder that can adapt to different requirements (Fibre Channel, storage networking, etc.) without requiring separate dedicated encoder circuits for each application.
3Ease of operation
If full 8B/10B encoding is performed early in the transmission pipeline, then control logic can switch terminators, but built-in encoder resources cannot be utilized
Solution Approach 1:
The running disparity computation is performed in advance of the actual encoding operation. The computation block calculates the running disparity value before the data enters the built-in 8B/10B encoder, allowing control logic to prepare appropriate terminator selections without requiring the encoder to be bypassed or replaced in the transmission pipeline.
Data Source
AI summary
A running disparity computation predictor is configured to analyze a frame of data, a control value, and an input tracking value and generate a predicted output tracking value. A frame selector is configured to generate an encoded frame of data based on this predicted output tracking value. A frame insertion module is configured to insert the encoded frame of data into a data stream wherein the predicted output tracking value matches an output tracking value generated by the data stream. This combination of elements can bypass an encoder built into a Hard IP block or proprietary hardware when the running disparity value is required to select control words.