Runtime Adaptive Finite State Machine Generator Circuit

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Solution Overview

Problem

Conventional techniques for implementing finite state machines (FSMs) and Boolean function networks in integrated circuits require creating different configuration bitstreams for each variation, leading to time-consuming reimplementation and redesign when switching between different FSMs or Boolean function networks, especially in larger circuit designs.

Innovation Solution

A finite state machine generator (FSMG) and Boolean function network generator (BFNG) are implemented within programmable circuitry of an integrated circuit, allowing for parameterization at runtime without the need to instantiate new circuitry, enabling dynamic implementation of various FSMs and Boolean function networks using the same generator circuit through parameterization data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If different configuration bitstreams are created for each FSM variation, then the correct FSM functionality is achieved, but the redesign and reimplementation time increases significantly

Engineering Contradiction:
ImproveFSM functionality correctnessVSAvoidredesign and reimplementation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

A single generator circuit is designed to implement multiple different finite state machines through parameterization. The generator receives parameter data that defines the specific FSM characteristics (number of states, transitions, outputs) and configures itself accordingly, allowing one circuit to perform multiple FSM functions without requiring separate dedicated circuits for each FSM type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The generator circuit incorporates reconfigurable elements that can be dynamically adjusted based on input parameters. Configuration data is loaded into memory elements and used to programmatically define FSM behavior, allowing the circuit to adapt its structure and logic based on the desired FSM specification rather than being fixed for a single function.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If traditional configuration methods are used for each FSM, then proper circuit implementation is achieved, but the device complexity and reimplementation overhead increase

Engineering Contradiction:
Improvecircuit implementation accuracyVSAvoidreimplementation overhead
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Instead of creating entirely new circuit implementations for each FSM, the system uses a single generator circuit template that is configured differently for each FSM type. The generator copies and adapts its internal structure based on parameter inputs, producing the desired FSM behavior through configuration rather than physical redesign, thereby reducing complexity while maintaining implementation accuracy.

Inventive Principle:
Principle #26Copying

3Reliability

If separate circuitry is instantiated for each FSM variation, then functionality is achieved, but the area and time required for switching between FSMs increases

Engineering Contradiction:
ImproveFSM operation correctnessVSAvoidcircuit area for switching between FSMs
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

One generator circuit is designed to implement multiple different finite state machines through parameterization. The generator receives parameter data that defines the specific FSM characteristics (number of states, transitions, outputs) and configures itself accordingly, allowing one circuit to perform multiple FSM functions without requiring separate dedicated circuits for each FSM type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10289093B1Runtime adaptive generator circuit
Publication Date: 2019.05.14 XILINX INC
  • US10289093B1 patent drawing
  • US10289093B1 patent drawing
  • US10289093B1 patent drawing

AI summary

A system can include a finite state machine generator implemented in programmable circuitry of an integrated circuit. The finite state machine generator is parameterizable to implement different finite state machines at runtime of the integrated circuit. The system can include a processor configured to execute program code. The processor is configured to provide first parameterization data to the finite state machine generator at runtime of the integrated circuit. The first parameterization data specifies a first finite state machine and the finite state machine generator implements the first finite state machine in response to receiving the first parameterization data from the processor.