Runtime Flow Debugging Network Devices via Internal Packet Counters
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Solution Overview
Problem
Debugging network devices that drop packets is challenging due to the lack of detailed familiarity with internal architecture and operation, making it difficult for users to identify the exact point of packet loss without intimate knowledge of the device's inner workings.
Innovation Solution
A system that uses a processing apparatus and memory to execute commands that trace the internal path and count values of packets between user-visible interfaces, providing detailed information on packet processing hardware logic blocks without requiring extra hardware, and allowing users to identify which block is dropping packets through CLI commands like #traceinternal path, counters, and counters interval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If detailed knowledge of internal architecture and operation is required to debug packet dropping, then debugging accuracy is improved, but ease of operation deteriorates
Solution Approach 1:
The patent introduces an intermediary debugging system that includes a processing apparatus and memory configured to automatically trace packet paths through internal hardware logic blocks. This intermediary system mediates between the user and the complex internal architecture, automatically extracting and presenting counter information from internal interfaces without requiring the user to have intimate knowledge of the device's inner workings. The system translates internal packet flow data into user-friendly diagnostic information.
2Measurement precision
If internal counter information is extracted to identify packet dropping points, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent extracts only the necessary counter information from internal interfaces of packet processing hardware logic blocks without modifying the core device architecture. The processing apparatus selectively extracts packet count data from specific internal interfaces along the packet path, separating the debugging function from the main device operations. This extraction approach provides precise packet loss identification while maintaining the original device structure and avoiding unnecessary complexity in the network device itself.
3Loss of information
If debugging procedures are performed to identify exact packet dropping points, then information completeness is improved, but loss of time increases
Solution Approach 1:
The patent implements preliminary action by pre-configuring the processing apparatus with knowledge of packet paths through internal interfaces and hardware logic blocks. Before actual packet dropping occurs, the system is prepared to immediately trace and analyze packet flow by accessing counter information from relevant internal interfaces. This preliminary preparation enables rapid debugging response when packet loss is detected, eliminating the need for time-consuming manual investigation of packet paths and counter data.
Data Source
AI summary
In one embodiment, the internal path traversed by packets between two user visible interface, selected by a user, is displayed. The path displayed includes internal interfaces traversed by the packets. First and second count values showing the packets traversing each displayed internal interface at the beginning and end of a selected time period are also displayed. A delta, being the difference between the first and second count values for each internal interface indicates the number of packets traversing the interface during the time period and can be analyzed to determine the identity of a packet processing hardware logic block where packets might be getting dropped.