Ruthenium Control Gate Electrodes in 3D NAND via Selective Deposition

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Solution Overview

Problem

Conventional three-dimensional NAND string manufacturing methods face challenges with excess control gate material causing substrate stress and warping, and inefficiencies in the deposition process, particularly with tungsten control gate electrodes.

Innovation Solution

The method involves forming a nucleation liner only in the back side recesses of the NAND stack, allowing for selective deposition of ruthenium control gate electrodes using atomic layer deposition, which reduces metal volume in back side openings, avoids etching issues, and enhances process throughput and cost-effectiveness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If tungsten control gate electrodes are formed using conventional deposition methods, then complete coverage is achieved, but excess material accumulates in back side openings causing substrate stress and warping

Engineering Contradiction:
Improvecontrol gate electrode coverageVSAvoidsubstrate stress and warping
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by forming the nucleation liner only in specific locations (back side recesses) rather than uniformly across all surfaces. This selective placement allows ruthenium to deposit only where needed, preventing excess material accumulation in back side openings while ensuring proper coverage in recess areas, thereby resolving the contradiction between complete coverage and substrate stress

Inventive Principle:
Principle #3Local quality

2Productivity

If nucleation liner is formed in back side openings, then ruthenium deposition is enabled, but excess material is deposited causing waste and additional processing steps

Engineering Contradiction:
Improvedeposition process efficiencyVSAvoidexcess ruthenium material
Core Design Contradiction:
ProductivityVSLoss of substance

Solution Approach 1:

The patent extracts the nucleation liner formation from the back side openings, applying it only in the back side recesses. This extraction eliminates the source of excess ruthenium deposition in the openings while maintaining the necessary nucleation surface in the recesses, thereby improving productivity by reducing material waste and eliminating additional etching steps to remove excess material

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If conventional tungsten control gate electrodes are used, then process compatibility is maintained, but manufacturing complexity and cost increase due to etching requirements

Engineering Contradiction:
Improveprocess compatibilityVSAvoidmanufacturing process steps
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent employs a disposable nucleation liner that is intentionally left in place rather than being removed. This liner serves its purpose of enabling ruthenium deposition and then remains as part of the final structure, eliminating the need for subsequent etching steps. This approach reduces manufacturing complexity and cost while maintaining process compatibility, as the liner's temporary function is fulfilled and it becomes part of the final device structure

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in improved NAND device performance by reducing substrate stress, minimizing excess material, and increasing manufacturing efficiency through selective ruthenium deposition within recesses, thereby forming effective control gate electrodes.

Implementation Method 1

selectively forming ruthenium control gate electrodes through the back side opening in the respective electrically conductive clam shaped nucleation liner regions

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Data Source

PatentEP3224863B1Metal word lines for three dimensional memory devices
Publication Date: 2020.01.29 SANDISK TECHNOLOGIES LLC
  • EP3224863B1 patent drawingFigure 1A~1C
  • EP3224863B1 patent drawingFigure 2
  • EP3224863B1 patent drawingFigure 3

AI summary

A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of insulating first material and sacrificial second material different from the first material over a major surface of the substrate, forming a front side opening in the stack, forming at least one charge storage region in the front side opening and forming a tunnel dielectric layer over the at least one charge storage region in front side opening. The method also includes forming a semiconductor channel over the tunnel dielectric layer in the front side opening, forming a back side opening in the stack and selectively removing at least portions of the second material layers to form back side recesses between adjacent first material layers. The method also includes forming electrically conductive clam shaped nucleation liner regions in the back side recesses and selectively forming ruthenium control gate electrodes through the back side opening in the respective electrically conductive clam shaped nucleation liner regions.