RXOC Calibration Clocking for DFE Memory Input Circuits
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Solution Overview
Problem
Existing resistor offset calibration (RXOC) procedures for static-dynamic random-access memory (SDRAM) face challenges due to large frequency ranges of the write clock (WCK), requiring additional circuits and synchronization states, which complicates design and reduces calibration accuracy.
Innovation Solution
An internal clock source is introduced in the RXOC circuit, eliminating the need for a CAS command and synchronization states, using a local oscillator to synchronize the DFE-selection component and RXOC control logic, thereby reducing silicon footprint and improving calibration stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an internal clock source is introduced in the RXOC circuit, then calibration accuracy is improved and device complexity is reduced, but additional circuits are required
Solution Approach 1:
An oscillator is introduced as an intermediary component to generate an internal clock source that mediates between the DFE-selection component and RXOC control logic, enabling synchronized operation without external CAS commands and improving calibration accuracy
Solution Approach 2:
The RXOC circuit is designed to be self-sufficient by incorporating an internal clock source that generates timing signals independently, eliminating the need for external synchronization states and CAS commands from outside the circuit
2Ease of operation
If CAS commands and synchronization states are eliminated, then ease of operation is improved and device complexity is reduced, but calibration stability may be affected
Solution Approach 1:
The oscillator provides continuous timing feedback to both the DFE-selection component and RXOC control logic, ensuring synchronized operation and maintaining calibration stability without requiring external CAS commands or synchronization states
3Adaptability or versatility
If the WCK frequency range is large, then adaptability is improved, but manufacturing precision is worsened due to additional circuits required
Solution Approach 1:
The oscillator is designed to generate timing signals that are independent of the WCK frequency variations, allowing the RXOC circuit to adapt to large WCK frequency ranges while maintaining consistent calibration accuracy without requiring additional frequency-dependent circuits
Data Source
AI summary
According to one aspect of the present disclosure, a peripheral circuit is provided. The peripheral circuit may include a DQ circuit comprising a plurality of decision feedback equalization (DFE) components. The peripheral circuit may include a resistor offset calibration (RXOC) circuit. The RXOC circuit may include an oscillator. The oscillator may generate an internal clock source. The RXOC circuit may include a DQ-selection component. The DQ-selection component may select a DFE component of the plurality of DFE components for calibration. The DQ-selection component may output a slicer result signal indicating an offset value received from the DFE component. The RXOC circuit may include control logic. The control logic may send a calibration signal associated with the DFE component to the DQ circuit based on the slicer result signal.