Self-Aligned Contact Hard Mask Planarization

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Solution Overview

Problem

Conventional semiconductor device fabrication processes using self-aligned contact (SAC) methods face challenges with mask overlay and patterning, leading to damage of gate hard masks and potential short failures due to rounded electrode profiles and insufficient polymer deposition during etching.

Innovation Solution

The method involves forming electrode patterns with a hard mask, applying a passivation layer and insulation layer, planarizing the shoulder portions of the hard mask using chemical mechanical polishing (CMP) or dry/wet etching before SAC etching to prevent damage and ensure proper contact hole formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sufficient amounts of polymers are produced during SAC etching to protect the nitride layer, then the nitride layer profile becomes normal, but the electrode upper part becomes rounded and polymer deposition over shoulder portions becomes insufficient

Engineering Contradiction:
Improvenitride layer integrityVSAvoidelectrode profile
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent applies preliminary action by forming a planarization layer (spin-on-glass or benzocyclobutene) over the electrode pattern before SAC etching. This planarization layer pre-compensates for the rounded profile by adding material that will be removed during etching, ensuring that the shoulder portions maintain a flat profile during SAC etching and enabling sufficient polymer deposition for complete insulation layer removal.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the physical and chemical parameters of the shoulder portions by forming a nitride-based spacer with a specific refractive index and erosion rate. The spacer is designed with parameters (thickness, material composition) that ensure it erodes at a controlled rate during SAC etching, maintaining the flat profile of shoulder portions while allowing the insulation layer to be completely removed.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the nitride layer is formed over the upper part of the electrode pattern without planarization, then the structure is simpler, but the nitride layer becomes damaged during SAC etching causing convex-concave profile

Engineering Contradiction:
Improveprocess stepsVSAvoidcontact hole profile
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The planarization layer is formed in advance to prevent the convex-concave profile defect. By pre-flattening the shoulder portions, the patent eliminates the need for complex polymer management during SAC etching, thereby preventing nitride layer damage while maintaining relatively simple process steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The spin-on-glass or benzocyclobutene layer acts as an intermediary between the electrode pattern and the SAC etching process. This intermediary layer protects the underlying nitride layer from damage by ensuring uniform polymer deposition, while being removable after the SAC etching is complete.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If polymer deposition is increased to protect the hard mask, then the nitride layer profile improves, but the insulation layer between gate patterns cannot be removed to sufficient level

Engineering Contradiction:
Improvehard mask protectionVSAvoidcontact hole opening
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating different surface properties at different locations. The planarization layer and nitride-based spacer are formed specifically over the shoulder portions where polymer deposition is insufficient, while leaving other areas unchanged. This localized modification enables sufficient polymer deposition only where needed, protecting the hard mask and ensuring complete insulation layer removal simultaneously.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces damage to the gate hard masks and prevents short failures by ensuring sufficient polymer deposition during SAC etching, allowing for accurate contact hole opening without the need for excessive polymer production.

Implementation Method 1

planarizing the shoulder portions of the hard mask using chemical mechanical polishing (CMP) or dry/wet etching

Methodology Applied
Scientific EffectChemical mechanical polishing:

Implementation Method 2

planarizing the shoulder portions of the hard mask using chemical mechanical polishing (CMP) or dry/wet etching

Methodology Applied
Scientific EffectDry etching:

Implementation Method 3

planarizing the shoulder portions of the hard mask using chemical mechanical polishing (CMP) or dry/wet etching

Methodology Applied
Scientific EffectWet etching:

Implementation Method 4

ensuring sufficient polymer deposition during SAC etching

Methodology Applied
Scientific EffectPolymer deposition:

Data Source

PatentUS7897499B2Method for fabricating a semiconductor device with self-aligned contact
Publication Date: 2011.03.01 SK HYNIX INC
  • US7897499B2 patent drawing
  • US7897499B2 patent drawing
  • US7897499B2 patent drawing

AI summary

A method for fabricating a semiconductor device includes forming electrode patterns over a substrate, wherein the electrode patterns include a hard mask, forming a passivation layer on the electrode patterns, forming an insulation layer on the passivation layer, filling a space between the electrode patterns, planarizing the insulation layer until shoulder portions of the hard mask are planarized, forming a mask pattern on a resultant structure, and etching a portion of the insulation layer to form a contact hole.