Sacrificial Carrier IC Packaging for Void-Free Underfill

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Solution Overview

Problem

Current integrated circuit packaging systems face challenges in simplifying manufacturing processes, reducing time to market, and lowering costs while achieving smaller dimensions, increased functionality, and higher IO connectivity, with existing solutions failing to provide comprehensive solutions for these issues.

Innovation Solution

The method involves using a sacrificial carrier assembly with a stack interconnector, mounting an integrated circuit with a connector over it, dispensing an underfill material free of voids, encapsulating the circuit, removing the carrier to expose the interconnector, and forming a base array over the underfill and interconnector, which enhances connectivity and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional packaging methods are used, then manufacturing processes are simplified, but reliability and connectivity capabilities are insufficient

Engineering Contradiction:
Improvepackaging reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sacrificial carrier assembly is prepared in advance with pre-formed stack interconnectors before the integrated circuit is mounted. This preliminary preparation allows for complex interconnector structures to be created beforehand, improving reliability without adding complexity to the main assembly process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The sacrificial carrier assembly acts as an intermediary structure that enables the formation of complex stack interconnectors and underfill material application. It serves as a temporary support structure that facilitates reliable connections while being removed after serving its purpose, thus enabling high reliability without permanent complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If conventional packaging systems are used, then manufacturing costs are controlled, but IO connectivity capabilities and functionality are limited

Engineering Contradiction:
ImproveIO connectivity capabilitiesVSAvoidmanufacturing ease
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent transitions from planar packaging to three-dimensional stackable packaging by forming vertical stack interconnectors through the sacrificial carrier assembly. This dimensional change enables multiple IO connections in the vertical direction, significantly increasing connectivity capabilities while maintaining manufacturing simplicity through the carrier-based approach.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The integrated circuit is mounted within the structure provided by the sacrificial carrier assembly, with stack interconnectors nested through the carrier. This nesting arrangement allows multiple connection levels to be integrated within a compact volume, enhancing functionality without complicating the manufacturing process.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Reliability

If underfill material contains voids, then manufacturing is easier, but reliability and structural integrity are reduced

Engineering Contradiction:
Improveunderfill material reliabilityVSAvoidmanufacturing productivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The sacrificial carrier assembly serves as an intermediary structure that guides the underfill material application process. It provides a defined cavity structure that ensures complete material filling without voids, improving reliability while maintaining manufacturing efficiency through the structured approach.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The underfill material is applied with specific attention to local filling quality within the cavities defined by the sacrificial carrier assembly. This localized quality control ensures void-free filling in critical areas, enhancing reliability without requiring complex global manufacturing processes.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9123733B1Integrated circuit packaging system with package underfill and method of manufacture thereof
Publication Date: 2015.09.01 JCET SEMICON (SHAOXING) CO LTD
  • US9123733B1 patent drawing
  • US9123733B1 patent drawing
  • US9123733B1 patent drawing

AI summary

A method of manufacture of an integrated circuit packaging system includes: providing a sacrificial carrier assembly having a stack interconnector thereover; mounting an integrated circuit having a connector over the sacrificial carrier assembly with the connector over the stack interconnector; dispensing an underfill material between the sacrificial carrier assembly and the integrated circuit with the underfill material substantially free of a void; encapsulating the integrated circuit over the sacrificial carrier assembly and the underfill material; exposing the stack interconnector by removing the sacrificial carrier assembly; and forming a base array over the underfill material and the stack interconnector.