Sacrificial Fill for Uniform BEOL Line Cuts
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Solution Overview
Problem
Conventional semiconductor fabrication techniques for backend-of-line (BEOL) interconnect structures struggle to consistently produce uniform gaps in metal lines, leading to shorts and degradations in yield, performance, and reliability.
Innovation Solution
The method involves forming a dielectric layer, a hard mask layer, and a mandrel layer on a semiconductor substrate, creating openings and depositing sacrificial cut materials to pattern photoresist, etching to form trenches separated by dielectric segments, and depositing metallic material within these trenches to define lines with uniform breaks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional blocking elements and processes are used to create gaps in metal lines, then the manufacturing process can be implemented, but the gaps are not uniform and lead to shorts and yield degradation
Solution Approach 1:
The patent applies preliminary action by forming the sacrificial cut material in the mandrel layer before the actual line patterning process. This pre-positioned sacrificial material defines the exact locations where gaps will later be created, ensuring uniform spacing and preventing shorts. The sacrificial cut material serves as a template that guides subsequent etching operations to create precisely positioned gaps in the metal lines.
Solution Approach 2:
The sacrificial cut material acts as an intermediary element between the mandrel layer and the final metal line pattern. This intermediate material is deposited, patterned, and then used to define the gap locations through selective removal. The intermediary sacrificial material enables precise gap formation without directly becoming part of the final interconnect structure, thereby ensuring uniform gaps and preventing manufacturing defects.
2Ease of manufacture
If conventional gap formation processes are used, then metal lines can be patterned, but non-uniform gaps cause shorts and performance degradation
Solution Approach 1:
The patent applies segmentation by dividing the gap formation process into distinct stages: first forming the sacrificial cut material in the mandrel layer, then using it as a mask during etching. This segmented approach separates the gap definition step from the metal line patterning step, allowing independent optimization of gap uniformity while maintaining ease of manufacture for the overall line patterning process.
3Productivity
If blocking elements are used to create line cuts, then the process can be completed, but uniformity is inconsistent leading to shorts
Solution Approach 1:
The sacrificial cut material in the mandrel layer performs a self-service function by automatically defining the gap locations and dimensions during the etching process. The material's position and dimensions self-determine the final gap characteristics without requiring additional alignment steps or complex blocking element processes, thereby maintaining high productivity while achieving consistent line cut uniformity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach consistently produces uniform line breaks, enhancing the reliability and performance of BEOL interconnect structures by minimizing gap failures and improving unit cell density.
Implementation Method 1
depositing a sacrificial cut material within the opening of the mandrel layer
Implementation Method 2
applying a photoresist material onto the mandrel layer, patterning the photoresist material to create a resist image
Implementation Method 3
selectively etching segments of the mandrel layer and the hard mask layer beneath the resist openings of the photoresist to remove the segments and transfer the resist image
Implementation Method 4
etching the dielectric layer utilizing the transferred resist image to create at least first and second trenches within the dielectric layer
Implementation Method 5
depositing a metallic material within the trench openings to define at least first and second lines in the trench openings
Data Source
AI summary
A method includes forming a dielectric layer on a semiconductor substrate, forming a hard mask layer on the dielectric layer, forming a sacrificial mandrel layer on the hard mask layer, depositing a sacrificial fill material in an opening in the sacrificial mandrel layer and utilizing the sacrificial fill material to selectively pattern the hard mask layer. The pattern defining first and second spaced openings in the hard mask layer. The method further includes etching the dielectric layer through the first and second openings in the hard mask layer to create first and second trenches in the dielectric layer separated by a dielectric segment of the dielectric layer.