Sacrificial Gate Capping Layer for Plasma Etch Protection
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Solution Overview
Problem
Semiconductor plasma processing techniques cause damage to cap layers and erosion of spacers on gate sidewalls, leading to uncontrolled variations in device electrical performance and yield loss.
Innovation Solution
A sacrificial capping layer is formed on top of semiconductor regions to protect them during plasma etching, which is later removed using a gentle wet clean process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If dry etch process is used to open contacts, then high aspect ratio contact holes can be opened, but damage to underlying material and erosion of spacers occur
Solution Approach 1:
A sacrificial capping layer is deposited over the gate stack before the contact hole etch process. This layer is formed in advance to protect the gate cap and spacer from plasma damage during the subsequent aggressive dry etching of high aspect ratio contact holes. The sacrificial layer is later removed after serving its protective function.
Solution Approach 2:
The sacrificial capping layer acts as an intermediary protective layer between the plasma etching process and the sensitive gate cap/spacer structures. It absorbs the harmful plasma effects while allowing the contact holes to be successfully etched through the underlying layers.
2Length of moving object
If dry etch process is used to open contacts, then contact holes are opened, but spacers on gate sidewalls are eroded
Solution Approach 1:
The sacrificial capping layer is deposited beforehand to protect the spacer structures during the contact hole etch process. This preliminary protective measure prevents plasma-induced erosion of the spacer material while allowing the contact holes to be formed.
Solution Approach 2:
The sacrificial capping layer serves as a mediator that shields the spacer structures from direct exposure to the aggressive plasma environment during dry etching, thereby preserving spacer integrity while enabling contact hole formation.
3Reliability
If sacrificial capping layer is formed and later removed, then gate protection is achieved, but additional process steps are added
Solution Approach 1:
The protective function is extracted as a separate, removable sacrificial capping layer that can be independently deposited and removed. This allows the protection mechanism to be added and then discarded after serving its purpose, minimizing long-term process complexity.
Solution Approach 2:
The sacrificial capping layer is deliberately designed to be temporary and removable. After fulfilling its protective role during contact hole etching, it is discarded through a subsequent removal process, leaving no permanent impact on the device structure beyond the intended protection benefits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents damage to semiconductor regions during plasma etching, maintaining device integrity and improving yield and performance.
Implementation Method 1
the forming a sacrificial layer includes performing an atomic layer deposition (ALD) process under processing conditions that reduce diffusion of reactant gases into the recesses
Implementation Method 2
the dry etch process possesses a plasma source that generates a sea of ions that accelerate in a manner that causes ion bombardment against sensitive device layers
Implementation Method 3
the dry etch process possesses a plasma source that generates a sea of ions that accelerate in a manner that causes ion bombardment against sensitive device layers
Data Source
AI summary
A method includes providing a substrate including metal gate stacks and source/drain contact regions in alternating arrangement along a surface of the substrate with a dielectric spacer separating each source/drain contact region from adjacent metal gate stacks. Each source/drain region is recessed within an opening between adjacent metal gate stacks such that source/drain contact regions provide a bottom of the recess and dielectric spacers provide sidewalls. The etch stop layer is formed on the substrate such that it conformally covers the metal gate stacks, the sidewalls and the bottom of each recess, and a sacrificial layer is formed over each of the metal gate stacks and on at least a portion of each sidewall. The etch stop layer is removed from the bottom of each recess to expose the source/drain contact, and the sacrificial layer is then removed from the metal gate stacks and the sidewalls of each recess.