Defect-Free SiC Substrate via Sacrificial Heteroepitaxy
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Solution Overview
Problem
The formation of semiconductor devices with SiC substrates is hindered by high defect densities due to lattice mismatch and thermal expansion differences between Si and SiC, leading to stress and defects such as triangle defects, surface pits, and dislocations, which increase manufacturing costs and reduce yield.
Innovation Solution
A sacrificial heteroepitaxy interface is created using a compliant, patterned Si substrate with inverted pyramids or micropillars to confine defects within a sacrificial layer, allowing for epitaxial growth of nearly defect-free SiC layers, followed by removal of the sacrificial layer to eliminate defects and lattice mismatch issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If SiC is grown on Si substrate, then manufacturing cost is reduced and processing is simplified, but defect density increases due to lattice mismatch and thermal expansion differences
Solution Approach 1:
The invention segments the SiC layer into multiple portions grown at different orientations and angles on the Si substrate. By dividing the SiC growth into multiple segments with different crystallographic orientations, the patent reduces the accumulation of defects that would occur in a single continuous growth process, thereby lowering overall defect density while maintaining the cost benefits of Si substrate processing
Solution Approach 2:
The invention performs preliminary actions by carefully controlling surface chemistry and optimizing etch processes before epitaxial growth begins. These preliminary steps prepare the Si substrate surface to minimize lattice mismatch effects and reduce the formation of defects during subsequent SiC growth, addressing the root cause of the contradiction before the main growth process
2Ease of manufacture
If heteroepitaxy is used to grow SiC on Si, then manufacturing cost is reduced, but stress and defects such as triangle defects, surface pits, and dislocations increase
Solution Approach 1:
The patent divides the SiC growth into multiple segments grown at different orientations and angles. This segmentation distributes the stress that would otherwise concentrate in a single continuous layer, reducing the formation of triangle defects, surface pits, and dislocations while maintaining the cost advantages of heteroepitaxial growth on Si substrate
Solution Approach 2:
The invention changes critical growth parameters including orientation, angle, and surface chemistry control during epitaxial growth. By varying these parameters across different growth segments, the patent optimizes stress distribution and minimizes defect formation, achieving lower defect densities while maintaining manufacturing cost benefits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a substantially defect-free SiC substrate, reducing manufacturing costs and improving yield while maintaining the benefits of SiC substrates like high breakdown voltage and heat dissipation.
Implementation Method 1
The heterointerface causes stress during temperature cycling and leads to defects in the SiC layer
Implementation Method 2
forming the SiC layer on a Si layer produces a heterointerface between two dissimilar materials with different lattice structures
Data Source
AI summary
A semiconductor device has a first substrate made of a first semiconductor material, such as silicon. A sacrificial layer is formed over a first surface of the first substrate. A seed layer is formed over the sacrificial layer. A compliant layer is formed over a second surface of the first substrate opposite the first surface of the first substrate. A first semiconductor layer made of a second semiconductor material, such as silicon carbide, dissimilar from the first semiconductor material is formed over the sacrificial layer. The first substrate and sacrificial layer are removed leaving the first semiconductor layer substantially defect-free. The first semiconductor layer containing the second semiconductor material is formed at a temperature greater than a melting point of the first semiconductor material. A second semiconductor layer is formed over the first semiconductor layer with an electrical component formed in the second semiconductor layer.