Sacrificial Layer Patterns with Concave Sidewalls for Semiconductor Reliability

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Solution Overview

Problem

In manufacturing three-dimensional semiconductor devices, slits or seams in conductive layers can negatively affect the reliability of the semiconductor device, primarily due to the etching process which may damage the gate dielectric layer.

Innovation Solution

The semiconductor device incorporates sacrificial layer patterns with concave sidewalls, alternately stacked with gate interlayer dielectric layers, allowing for controlled etching to reduce the formation of slits and seams, thereby minimizing damage to the gate dielectric layer. These sacrificial layers have different etch rates, ensuring that only specific areas are etched, reducing the formation of slits and enhancing the reliability of the device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If etching process is performed to create slits or seams in conductive layers, then the conductive layers can be separated, but the gate dielectric layer may be damaged and reliability decreases

Engineering Contradiction:
Improveconductive layer separationVSAvoiddevice reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A sacrificial layer is introduced as an intermediary element between the gate dielectric layer and the conductive layer. This sacrificial layer absorbs the mechanical stress and deformation during the etching process, preventing direct damage to the gate dielectric layer while still allowing the conductive layer to be separated into slits or seams.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The sacrificial layer is formed and positioned in advance before the etching process. By pre-placing this protective layer, the gate dielectric layer is shielded from potential damage during subsequent manufacturing steps, ensuring reliability is maintained while still enabling the desired conductive layer separation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If sacrificial layers are used to protect gate dielectric layer, then damage to gate dielectric layer is reduced, but device structure becomes more complex

Engineering Contradiction:
Improvegate dielectric layer integrityVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sacrificial layer is designed to be temporary and removable. It is formed to protect the gate dielectric layer during manufacturing, then completely removed after serving its protective function. This approach maintains device reliability during production while eliminating the additional structural complexity in the final product.

Inventive Principle:
Principle #34Discarding and recovering

Solution Approach 2:

The sacrificial layer is treated as a disposable, low-cost temporary structure that is formed, used for protection during etching, and then removed. This disposable approach allows the use of simple materials and processes for the sacrificial layer without concern for long-term structural complexity, as it is completely eliminated after serving its protective purpose.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of sacrificial layer patterns with controlled etching reduces the area where slits are formed, minimizing damage to the gate dielectric layer and improving the reliability and characteristics of the semiconductor device, while also simplifying processing by eliminating the need for separate insulation patterns between upper selection lines.

Implementation Method 1

an etch rate of the first sacrificial layer pattern may be different from an etch rate of the gate interlayer dielectric layers

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS9601496B2Semiconductor device having sacrificial layer pattern with concave sidewalls and method fabricating the same
Publication Date: 2017.03.21 SAMSUNG ELECTRONICS CO LTD
  • US9601496B2 patent drawing
  • US9601496B2 patent drawing
  • US9601496B2 patent drawing

AI summary

In a method of fabricating a semiconductor device, sacrificial layer patterns are formed by leaving portions of sacrificial layers, instead of completely removing the sacrificial layers. Thus, the reliability of the semiconductor device may be increased, and the process of manufacturing the same may be simplified.