Sacrificial Layer Planarization for Semiconductor Surface Unevenness
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Solution Overview
Problem
Semiconductor fabrication processes often result in uneven top surfaces of wafers or substrates, necessitating a method to planarize these surfaces for improved further processing.
Innovation Solution
A sacrificial layer is applied to the surface, followed by chemical-mechanical polishing to reduce unevenness, with the polishing rate of the sacrificial layer being lower than that of the body material to control the planarization process, allowing for the removal of uneven features and achieving a substantially planar surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical-mechanical polishing is performed directly on the semiconductor wafer surface, then the unevenness can be reduced, but the polishing rate is difficult to control and may remove too much or too little material
Solution Approach 1:
A sacrificial layer is applied as an intermediary between the polishing pad and the semiconductor wafer surface. This sacrificial layer has a polishing rate that is different from and higher than that of the semiconductor material, allowing it to be selectively removed while providing a controlled polishing interface. The sacrificial layer mediates the polishing process, enabling precise control over the amount of semiconductor material removed while achieving the desired surface planarity.
2Manufacturing precision
If a sacrificial layer with lower polishing rate than body material is used, then the polishing process becomes controllable, but additional process steps are required
Solution Approach 1:
The sacrificial layer serves multiple functions: it acts as a polishing rate control mechanism, provides a protective interface during polishing, and can be selectively removed after polishing to reveal the planarized semiconductor surface. By combining these functions into a single layer, the invention reduces overall process complexity despite adding the sacrificial layer deposition step.
Solution Approach 2:
The sacrificial layer is intentionally designed to be temporary and removable. It is deposited, used for controlled polishing, and then completely removed to reveal the planarized semiconductor surface. This discarding approach allows the sacrificial layer to perform its controlling function without permanently adding complexity to the final device structure.
3Manufacturing precision
If the sacrificial layer polishing rate is made significantly lower than body material, then selectivity is improved, but the overall polishing time increases
Solution Approach 1:
The invention optimizes the polishing rate ratio between sacrificial layer and semiconductor material to achieve an balance between selectivity and productivity. By carefully selecting the sacrificial layer material and polishing conditions, a moderate polishing rate difference is achieved that provides sufficient selectivity for controlled planarization while maintaining acceptable polishing speeds for manufacturing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces surface unevenness, enabling controlled planarization of semiconductor surfaces, which is beneficial for subsequent processing steps by minimizing the impact of features like bird heads and resulting in a smoother surface topology.
Implementation Method 1
A chemical/mechanical polishing is performed on the sacrificial layer and material of the body to reduce the unevenness of the surface
Data Source
AI summary
In order to reduce an unevenness of a surface of a body, a sacrificial layer is applied to the surface, a chemical-mechanical polishing of the sacrificial layer and material of said body is performed to reduce the unevenness of the surface, and a remainder of the sacrificial layer, if any, may be removed.