Sacrificial Layer Transfer for Organic Interconnection Routing

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Solution Overview

Problem

Existing interconnection technologies using organic substrates face challenges in routing wiring and terminal layout due to the presence of interconnection members like silicon bridges and organic layered connections, which restrict the placement and connection of ground and power supply terminals.

Innovation Solution

A method for fabricating an interconnection layer carrying structure involves depositing an organic layer with a multi-layer wiring structure on a carrier, followed by the addition of a sacrificial layer, allowing for the transfer of the interconnection layer onto a target substrate, enabling side connections and high-density interconnections between chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If interconnection members (silicon bridge, organic layered interconnection) are used to establish interconnections between chips, then interconnection between chips is achieved, but the routing of wiring for connecting chips and for driving the chips is restricted

Engineering Contradiction:
Improveinterconnection between chipsVSAvoidrouting of wiring
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

A sacrificial layer is introduced as an intermediary element during the fabrication process. This sacrificial layer is deposited over the organic top layer, allowing the organic layer to be diced together with the carrier and sacrificial layer. After dicing, the sacrificial layer is removed, enabling the organic layer to be transferred to a target substrate. This intermediary approach resolves the contradiction by providing a temporary support structure that enables flexible routing while maintaining interconnection reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If interconnection members are used to establish interconnections between chips, then chip connection is achieved, but the terminal layout of the chips is restricted

Engineering Contradiction:
Improvechip connectionVSAvoidterminal layout
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The sacrificial layer serves as a mediator that enables the organic layer with its multi-layer wiring structure to be processed and transferred independently. This allows the terminal layout to be optimized for chip connection requirements while the sacrificial layer provides the necessary support during fabrication and dicing processes, thus resolving the contradiction between reliable chip connection and flexible terminal layout.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If wiring is routed from power and ground terminals of the chip to external power supply and ground lines, then power supply connection is established, but the presence of interconnection members makes it difficult to route wiring

Engineering Contradiction:
Improvepower supply connectionVSAvoidwiring routing
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The sacrificial layer enables the organic layer to be diced and transferred as a complete structure with pre-established wiring routes. This allows power and ground terminals to be connected to external power supply and ground lines through the organic layer's wiring structure without being constrained by the presence of interconnection members, thus resolving the contradiction between reliable power supply connection and ease of wiring routing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances flexibility in wiring routing and relaxes terminal layout constraints, facilitating high-density interconnections and improving the performance of electronic devices by allowing for more efficient power supply and ground line routing.

Implementation Method 1

An organic layer may be deposited on a carrier

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

An organic layer may be deposited on a carrier

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 3

A sacrificial layer may be deposited on the organic top layer

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS11574817B2Fabricating an interconnection using a sacrificial layer
Publication Date: 2023.02.07 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11574817B2 patent drawing
  • US11574817B2 patent drawing
  • US11574817B2 patent drawing

AI summary

Aspects of the present disclosure relate to a method for fabricating an interconnection layer carrying structure. A carrier is provided. An organic layer is deposited on the carrier, wherein the organic layer includes a multi-layer wiring structure therein, and the uppermost surface is covered with an organic top layer. A sacrificial layer is deposited on the organic top layer. The carrier and the organic layer are diced together with the sacrificial layer.