Sacrificial Metal Layer for FinFET Gate Line-Cut ILD Protection
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Solution Overview
Problem
Existing semiconductor manufacturing processes for FinFET devices face challenges in reducing inter-layer dielectric (ILD) loss during the metal gate cut process, particularly due to over-etching, which degrades device reliability.
Innovation Solution
The implementation of a metal gate cut process with varying thicknesses of metal layers on fins and neighboring line-cut regions, along with the use of a sacrificial metal portion to prevent lateral etching, mitigates ILD loss by reducing the need for significant over-etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a metal gate cut process is performed to separate metal gate lines, then the metal gate electrode can be properly patterned, but portions of the inter-layer dielectric (ILD) are lost due to over-etching
Solution Approach 1:
A sacrificial metal layer is introduced as an intermediary between the ILD and the metal gate layer. This sacrificial layer absorbs the over-etching damage during the metal gate cut process, preventing direct etching of the ILD. The sacrificial layer is subsequently removed, leaving the ILD intact while achieving proper metal gate patterning.
Solution Approach 2:
The sacrificial metal layer is deposited beforehand to provide protection during the upcoming metal gate cut process. This preliminary protective action ensures that when the cut process is performed, the ILD is already shielded and will not suffer from over-etching damage.
2Productivity
If significant over-etching is performed during the metal gate cut process to ensure complete metal removal, then the metal gate line can be fully separated, but the inter-layer dielectric layer is damaged or removed
Solution Approach 1:
The sacrificial metal layer serves as a mediator that allows the etch process to proceed aggressively to ensure complete metal gate separation, while the sacrificial layer itself absorbs the excessive etching that would otherwise damage the ILD and compromise device reliability.
Solution Approach 2:
The sacrificial metal layer is a temporary copy or placeholder that replicates the position and function needed during the etch process, allowing the actual metal gate structure to be properly formed without directly exposing the ILD to damaging etching conditions.
Data Source
AI summary
Provided is a metal gate structure and related methods that include forming a first fin and a second fin on a substrate. In various embodiments, the first fin has a first gate region and the second fin has a second gate region. By way of example, a metal-gate line is formed over the first and second gate regions. In some embodiments, the metal-gate line extends from the first fin to the second fin, and the metal-gate line includes a sacrificial metal portion. In various examples, a line-cut process is performed to separate the metal-gate line into a first metal gate line and a second gate line. In some embodiments, the sacrificial metal portion prevents lateral etching of a dielectric layer during the line-cut process.