Sacrificial Optical Couplers for Wafer-Level Photonic Testing
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Solution Overview
Problem
Current optical data communication systems face challenges in testing photonic devices within semiconductor chips before deployment, particularly due to the inaccessibility of chip edges until the chips are singulated from the wafer, which hinders wafer-level photonic testing for in-plane fiber couplers.
Innovation Solution
The implementation of a sacrificial optical structure with an out-of-plane fiber-to-chip optical coupler allows for wafer-level photonic testing by coupling light into the chip before singulation, using an out-of-plane configuration that extends through the optical fiber attachment region, enabling testing of photonic devices while the wafer is still intact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If wafer-level photonic testing is performed using in-plane fiber couplers, then testing can be conducted before singulation, but the chip edges must be accessible which is not possible until singulation
Solution Approach 1:
The patent transitions from in-plane fiber couplers (2D planar configuration) to out-of-plane fiber couplers (3D vertical configuration). The out-of-plane couplers extend through the optical fiber attachment region to accessible surfaces of the wafer, enabling light coupling without requiring edge access. This dimensional change resolves the contradiction by allowing wafer-level testing while maintaining wafer integrity.
Solution Approach 2:
The patent introduces sacrificial optical structures as intermediary elements that facilitate out-of-plane light coupling. These structures temporarily enable optical access through the wafer thickness during testing, then are removed to allow subsequent in-plane fiber attachment. The intermediary structures bridge the gap between the need for early testing and the requirement for proper fiber coupling geometry.
2Ease of operation
If out-of-plane optical couplers are used for wafer-level testing, then chip accessibility is improved, but additional sacrificial structures are required
Solution Approach 1:
The sacrificial optical structures are fabricated in advance during the wafer processing sequence, before singulation and final fiber attachment. This preliminary action enables wafer-level testing to occur earlier in the manufacturing flow, and the structures are subsequently removed to reveal the final in-plane coupling geometry without requiring complex post-processing.
Solution Approach 2:
The sacrificial optical structures are temporary elements that are intentionally discarded after serving their testing purpose. Their removal recovers the optical fiber attachment region for its intended function with permanent in-plane fiber couplers. This approach accepts temporary complexity to achieve permanent simplicity and functionality.
3Reliability
If in-plane fiber couplers are used, then normal chip operation is maintained, but wafer-level testing cannot be performed before singulation
Solution Approach 1:
The patent separates the testing function from the final operational configuration. Out-of-plane sacrificial structures enable testing in a temporary configuration, then are removed to restore the intended in-plane coupling architecture for normal operation. This segmentation allows testing and operational requirements to be satisfied at different stages without compromise.
Solution Approach 2:
Instead of using the final in-plane coupling configuration for testing, the patent inverts the approach by using temporary out-of-plane structures for testing, then transitioning to the standard in-plane configuration for operation. This inversion enables early testing while preserving the reliability of the final design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method facilitates Known-Good-Die determination and efficient photonic testing without interfering with normal chip operation, ensuring reliable photonic device functionality post-singulation and packaging.
Implementation Method 1
The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip
Data Source
AI summary
A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.


