Sacrificial Plug Planarization for Film Layer Topography Control

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Solution Overview

Problem

Existing methods for fabricating semiconductor devices face challenges in achieving adequate planarization of film layers, particularly due to the coating-loading-effect caused by varying feature densities on the substrate, which results in non-flat topography and limited planarization.

Innovation Solution

A method involving the formation of sacrificial plugs to selectively recess and modulate the height of film layers, allowing for improved planarization by individually etching portions of the film layer, thereby reducing the height difference between regions with different feature densities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional planarization methods are used, then manufacturing simplicity is maintained, but planarization quality deteriorates due to coating-loading-effect

Engineering Contradiction:
Improveplanarization qualityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The film layer is divided into multiple regions based on feature density, with sacrificial plugs selectively formed in high-density regions. This segmentation allows differential etching to address the coating-loading-effect in specific areas without affecting the entire wafer, thereby improving planarization quality while maintaining reasonable process complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by forming sacrificial plugs only in regions with high feature density where the coating-loading-effect is most severe. The etching process is then applied locally to these regions, providing targeted planarization where needed while leaving other regions unchanged, thus improving overall planarization quality without unnecessarily complicating the entire process.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If sacrificial plugs are formed to improve planarization, then topography control improves, but manufacturing cost increases

Engineering Contradiction:
Improvetopography controlVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

Sacrificial plugs are introduced as intermediary structures that facilitate the planarization process. These plugs are formed in high-density regions and used as etch stops during the etching process. After etching, the sacrificial plugs are removed. This intermediary approach enables precise topography control while using simple, compatible materials and processes that minimize additional manufacturing costs.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The sacrificial plugs are designed as temporary, disposable structures made from inexpensive materials. They serve their purpose during the etching process to control topography and are then completely removed. This approach provides effective topography control without requiring permanent, costly structural modifications to the device.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Manufacturing precision

If uniform etching is applied across the substrate, then process simplicity is maintained, but planarization effectiveness deteriorates due to varying feature densities

Engineering Contradiction:
Improveplanarization effectivenessVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming sacrificial plugs in high-density regions before the etching process. These plugs are strategically placed to compensate for the coating-loading-effect that will occur during etching. This preliminary modification of the substrate structure enables the subsequent etching process to produce more uniform results across regions with varying feature densities, improving planarization effectiveness while adding only one preparatory step.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the topography difference between regions, enhancing the planarization of film layers and providing a flexible, low-cost method for achieving desired topography, which is beneficial for subsequent processes in semiconductor device fabrication.

Implementation Method 1

individually etching portions of the film layer

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS9799529B2Method of planarizing a film layer
Publication Date: 2017.10.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9799529B2 patent drawing
  • US9799529B2 patent drawing
  • US9799529B2 patent drawing

AI summary

A method of fabricating a semiconductor device is disclosed. The method includes forming a first flowable-material (FM) layer over a substrate. A top surface of the first FM layer in a first region is higher than a top surface of the first FM layer in a second region. The method also includes forming a sacrificial plug to cover the first FM layer in the first region, forming a second FM layer over the sacrificial plug in the first region and over the first FM layer in the second region, performing a first recessing process such that the second FM layer is removed in the first region and performing a second recessing process on the second FM layer in the second region while the first FM layer is protected by the sacrificial plug in the first region.