Sacrificial Polysilicon Cap for STI Oxide Loss Prevention
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Solution Overview
Problem
The integration of multiple parts in System-on-Chip (SoC) solutions, such as logic, mixed-signal, analog, non-volatile memory, and High Voltage components, leads to excessive Shallow Trench Isolation (STI) oxide loss during the Front End of Line (FEOL) process, causing process defects, reduced etch and patterning margins, unbalanced well profiles, and undesirable transistor behavior due to sharp gate/poly edges and excessive STI divot formation.
Innovation Solution
A method involving the use of a sacrificial polysilicon layer to cap the STI oxide during FEOL, which is oxidized and then selectively removed to prevent oxide loss, allowing for robust integration of different parts and maintaining the STI step height and depth, thereby eliminating sharp edges and divot formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple implant steps are performed to integrate logic, mixed-signal, analog, NVM, HV and DTI parts in SoC solutions, then the integration capability is improved, but the cleaning step frequency increases causing excessive STI oxide loss
Solution Approach 1:
A sacrificial polysilicon layer is deposited over the STI oxide before the FEOL cleaning steps. This preliminary protective layer prevents the STI oxide from being removed during subsequent cleaning operations, allowing multiple implant steps to be performed without excessive STI oxide loss.
Solution Approach 2:
The sacrificial polysilicon layer acts as an intermediary protective barrier between the STI oxide and the cleaning chemicals. It absorbs the harmful effect of cleaning steps while protecting the underlying STI oxide, enabling versatile device integration without compromising STI integrity.
2Strength
If high STI field step height is used at the beginning of the process, then the initial isolation is improved, but process defect issues and reduced etch process margins occur
Solution Approach 1:
The sacrificial polysilicon layer enables precise control of the STI field step height by protecting the STI oxide during processing. This allows optimization of the step height parameter to achieve adequate isolation while maintaining process margins and reducing defects, rather than using excessively high step heights.
3Ease of operation
If excessive STI oxide loss occurs during FEOL, then the processing flexibility is improved, but STI divot formation and edge leakage increase
Solution Approach 1:
The sacrificial polysilicon layer is deposited in advance to protect the STI oxide edges during FEOL processing. This preliminary protection prevents the formation of STI divots and maintains sharp, clean edges, eliminating edge-related leakage while allowing flexible processing.
4Device complexity
If excessive STI oxide loss occurs during FEOL, then the process simplicity is improved, but STI depth reduction and isolation breakdown occur
Solution Approach 1:
The sacrificial polysilicon layer serves as a protective intermediary that prevents STI oxide loss during necessary cleaning steps. This maintains the intended STI depth and isolation integrity, ensuring manufacturing precision while allowing the process to remain relatively simple with the addition of just one protective layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces STI oxide loss, maintains desired STI depth, and enhances the reliability of semiconductor devices by preventing excessive field oxide loss and divot formation, improving process margins and transistor behavior.
Implementation Method 1
growing the thick oxide layer, oxidizing the sacrificial polysilicon layer to form an oxidized sacrificial polysilicon layer
Data Source
AI summary
A method of fabricating a semiconductor device with Shallow Trench Isolation (STI) includes performing the following steps in the following sequence: providing a substrate comprising first and second gate regions separated by a trench formed in the substrate, wherein the trench is filled with an STI material. The method further includes depositing a sacrificial polysilicon layer covering the STI material; growing a thick oxide layer on the first and second gate regions; removing the thick oxide layer from the first gate region while leaving the thick oxide layer in the second gate region.