Sacrificial Multilayer Stack for High-Aspect-Ratio Metal Patterning
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Solution Overview
Problem
Current semiconductor device fabrication techniques face challenges in forming complex multi-layer stacks, particularly in etching trenches and recessing sidewalls without metal residue and maintaining a vertical profile, which affects the integrity and performance of 3D NAND structures.
Innovation Solution
A method involving a metal-free multi-layer stack with a sacrificial layer is used, where the sacrificial layer is selectively etched to create spaces, and metal is deposited later, avoiding direct etching of metal and maintaining a metal-free environment during patterning to prevent residue and profile degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal-containing multi-layer stacks are etched to form trenches and recesses, then device functionality is achieved, but metal residue and profile degradation occur
Solution Approach 1:
The patent applies preliminary action by depositing the metal layer before etching the dielectric materials. This sequence allows the metal to be protected during subsequent etching operations, preventing metal residue and profile degradation. The metal layer is deposited on the substrate first, then dielectric layers are formed and etched around it, ensuring the metal remains intact without contamination.
Solution Approach 2:
The patent inverts the conventional fabrication sequence by depositing metal before forming and etching dielectric layers, rather than the traditional approach of forming dielectric layers first and then adding metal. This inversion protects the metal from etching damage and residue formation, as the metal is already in place and can be protected by the dielectric layers during subsequent processing steps.
2Reliability
If complex multi-layer stacks with metal are fabricated, then device performance is improved, but process complexity increases
Solution Approach 1:
The patent simplifies the fabrication process by performing the metal deposition early in the process sequence, before dielectric layer formation and etching. This preliminary action reduces process complexity by eliminating the need for complex metal protection schemes and multiple etching steps that would be required if metal were added later in the fabrication sequence.
3Length of moving object
If high aspect ratio trenches are etched in metal-containing stacks, then vertical scaling is achieved, but sidewall profile degradation occurs
Solution Approach 1:
The patent achieves high aspect ratio trenches with maintained sidewall profiles by depositing metal before etching the dielectric layers. This preliminary metal deposition allows the formation of deep trenches with vertical sidewalls, as the metal layer provides structural support and protection during the etching process, preventing sidewall collapse or degradation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high aspect ratio patterning and vertical scaling with reduced risk of metal residue, improving device integrity and performance by allowing precise control over the etching process and eliminating the challenges of etching metal-containing stacks.
Implementation Method 1
after etching the trench or via, selectively etching the sacrificial layer relative to other materials of the metal-free multi-layer stack to form at least one space between layers
Implementation Method 2
depositing metal in the at least one space to form a metal-containing multi-layer stack having a trench or via etched therein
Data Source
AI summary
Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.