Sacrificial Test Pad Layout for 3D Packaging Vias

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Solution Overview

Problem

Existing redistribution layer (RDL) test pads in integrated circuits are larger than line pitches, occupying space and hindering efficient via placement, particularly in three-dimensional (3D) packaging, and are less compatible with 3D packaging due to increased pitch distances.

Innovation Solution

Formation of a sacrificial test pad for probe testing, followed by its removal or modification to create space for via landing, using methods such as complete removal, partial planarization, or patterning to reduce the pad's footprint.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional test pads are used for probe testing, then testing functionality is achieved, but space is occupied and via placement is hindered

Engineering Contradiction:
Improvetesting functionalityVSAvoidpad area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The test pad structure is segmented into multiple functional layers: a sacrificial pad layer for probing, a via layer positioned beneath it, and a dielectric layer separating them. This segmentation allows the test pad to be vertically stacked rather than horizontally spread, enabling via placement directly underneath the pad and eliminating the need to avoid via landing zones around traditional pads.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from a two-dimensional pad layout to a three-dimensional stacked structure. The test pad is moved to a higher elevation layer while vias are positioned beneath in lower layers, utilizing the vertical dimension to resolve the space conflict. This dimensional change allows both testing functionality and efficient via placement to coexist without horizontal interference.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If test pads are made larger for probe access, then probe contact is improved, but pitch distances increase and 3D packaging compatibility decreases

Engineering Contradiction:
Improveprobe contactVSAvoid3D packaging compatibility
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

By elevating the test pad to a higher layer in the vertical stack, the invention maintains adequate probe contact area on the top surface while removing the pad's horizontal interference with via placement. This vertical positioning allows smaller pad footprints that are compatible with tighter pitch requirements for 3D packaging, as the pad no longer needs to be horizontally larger for probe access.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The sacrificial pad is formed in advance as a temporary structure that facilitates probe testing during manufacturing. After testing is complete, the sacrificial pad is removed, having served its preliminary purpose. This preliminary action allows the structure to be optimized for testing temporarily, then reconfigured for final packaging without the testing structure's constraints.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250349627A1Sacrificial test pad
Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250349627A1 patent drawing
  • US20250349627A1 patent drawing
  • US20250349627A1 patent drawing

AI summary

The present disclosure provides a redistribution structure that includes a metal line, a first dielectric layer disposed over the metal line, a first etch stop layer (ESL) disposed over the first dielectric layer, a second dielectric layer disposed over the first ESL, and a conductive via extending through the second dielectric layer, the first ESL and the first dielectric layer to contact the metal line. A lower portion of the second dielectric layer extends downward through the first ESL and the first dielectric layer and partially into the metal line.