Sacrificial Wafer Panel-Level IC Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional integrated circuit packaging methods using leadframes are inefficient and costly, particularly in terms of thermal performance and scalability, as they require extensive supporting structures and are limited to individual die packaging rather than panel-level processing.
Innovation Solution
The method involves metallizing a sacrificial semiconductor wafer substrate to create electrically isolated contacts, which are partially exposed and connected by additional metallization layers after encapsulation, allowing for panel-level packaging of integrated circuit dice with improved thermal performance and higher throughput by eliminating the need for tie bars and supporting structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional leadframe packaging methods are used, then individual die packaging is achieved, but production efficiency and throughput are limited
Solution Approach 1:
The patent merges multiple individual die packaging operations into a single panel-level process. Multiple dice are packaged simultaneously on a common substrate panel, combining what were previously separate individual operations into one integrated process, thereby dramatically improving production efficiency
Solution Approach 2:
The substrate panel serves multiple functions: it provides mechanical support for multiple dice, establishes electrical connections through metallized contacts, enables simultaneous packaging of multiple devices, and facilitates thermal management. This multi-functional approach eliminates the need for separate supporting structures for each die
2Temperature
If extensive supporting structures like tie bars are used in leadframe packaging, then mechanical support is provided, but thermal performance deteriorates
Solution Approach 1:
The patent extracts and eliminates the tie bars and extensive supporting structures that are characteristic of conventional leadframe packaging. By removing these thermally problematic elements, the invention achieves superior thermal performance while maintaining mechanical support through the substrate panel itself
Solution Approach 2:
The invention changes the fundamental parameters of the packaging structure by transitioning from thin leadframe materials to a substantial substrate panel. This parameter change enables direct thermal pathways from the dice through the substrate, dramatically improving heat dissipation compared to the conventional leadframe approach
3Productivity
If conventional individual die packaging is used, then each die is packaged separately, but costs increase and throughput decreases
Solution Approach 1:
The patent combines multiple individual packaging operations into a single panel-level process. By packaging multiple dice simultaneously on one substrate panel rather than individually, the invention achieves economies of scale that reduce per-unit costs while dramatically increasing throughput
Solution Approach 2:
The substrate panel is prepared in advance with metallized contacts and supporting structures before the dice are attached. This preliminary preparation enables subsequent rapid attachment and packaging of multiple dice without requiring individual preparation steps for each die, thereby reducing costs and increasing throughput
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces costs, enhances thermal performance, and increases production efficiency by enabling larger-scale panel-level packaging with thinner contacts and die attach pads, resulting in higher package density and throughput.
Implementation Method 1
The first surface of a sacrificial semiconductor substrate is metallized to form first portions of an array of metallized electrically isolated contacts
Implementation Method 2
the first surface of the substrate is covered with a molding material while leaving first surfaces of the contacts substantially exposed and uncovered by molding material
Implementation Method 3
metallizing the substrate to form second portions of the array of contacts after encapsulating the first surface of the substrate and the first portions of the contacts
Implementation Method 4
an associated trace portion that electrically connects the bonding portion with the portion of the contact directly over the associated first portion of the contact
Data Source
AI summary
Panel level methods and systems for packaging integrated circuits are described. In a method aspect of the invention, a substrate formed from a sacrificial semiconductor wafer is provided having a plurality of metallized device areas patterned thereon. Each device area includes an array of metallized contacts. Dice are mounted onto each device area and electrically connected to the array of contacts. The surface of the substrate including the dice, contacts and electrical connections is then encapsulated. The semiconductor wafer is then sacrificed leaving portions of the contacts exposed allowing the contacts to be used as external contacts in an IC package. In various embodiments, other structures, including saw street structures, may be incorporated into the device areas as desired. By way of example, structures having thicknesses in the range of 10 to 20 microns are readily attainable.