Safe Memory Repair Control Logic for Multibit Error Isolation
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Solution Overview
Problem
Existing memory systems with redundant elements face challenges in minimizing multibit errors, which can lead to catastrophic failures in critical applications, due to the ripple effect caused by circuit failures in known repair control logic.
Innovation Solution
The implementation of repair control logic that eliminates the ripple effect by using comparator circuits to determine if a bit slice's location value is greater than a defective bit slice's, and switching data to adjacent bit slices, thereby reducing the risk of multibit errors through data switching logic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If known repair control logic with ripple effect circuitry is used to switch data from defective bit slices, then data can be redirected to redundant bit slices, but circuit failures may propagate multibit errors across multiple bit slices
Solution Approach 1:
The patent divides the memory array into independent bit slice segments, each with its own dedicated comparator circuit and switching circuit. This segmentation isolates potential failures within individual bit slices, preventing ripple effects from propagating to other segments. Each bit slice operates independently with self-contained repair control logic.
Solution Approach 2:
The patent introduces independent comparator circuits as intermediary elements between the address input and switching circuits for each bit slice. These comparator circuits act as mediators that independently evaluate address values and control switching without being influenced by adjacent bit slice operations, thereby blocking the propagation of errors through the system.
2Adaptability or versatility
If redundant bit slices are added to allow repair of defective slices, then memory can continue operation after defects, but the complexity of repair control logic increases
Solution Approach 1:
The patent implements identical comparator circuits and switching circuits in each bit slice position throughout the memory array. This homogeneous replication of repair control logic across all bit slices simplifies the overall design by using standardized, modular components rather than complex unique logic for each position, making the system more manageable despite the added redundancy capability.
Data Source
AI summary
Repair control logic for a safe memory having redundant elements is provided. The repair control logic includes comparison logic including, for each bit slice of a memory array, a comparator circuit configured to determine whether a location value of an associated bit slice of the memory array is greater than a location value of a defective bit slice of the memory array, and data switching logic including, for each bit slice of the memory array, a switching circuit, responsive to a determination that the location value of the associated bit slice is greater than the location value of the defective bit slice, to switch data from the associated bit slice to an adjacent bit slice of the memory array.