Safety Disconnect Circuit With Automatic Retry for False Faults
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing safety disconnect circuits in DC-DC voltage converters often trigger false faults, leading to unnecessary power shutdowns and increased system quiescent current, which can drain batteries quickly and require costly additional components.
Innovation Solution
A safety disconnect circuit with an automatic retry feature that includes a logic circuit, latch, counter, and dual power path for the fault latch, allowing the system to automatically retry and verify fault persistence before permanent shutdown, reducing false triggers and maintaining system operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a safety disconnect circuit is implemented to detect and respond to faults, then system safety and protection are improved, but false fault triggers cause unnecessary power shutdowns and increased system quiescent current
Solution Approach 1:
The circuit performs preliminary verification actions before triggering a permanent shutdown. When a fault is detected, the circuit attempts to clear the fault condition and verify system recovery before latching off power, preventing unnecessary permanent shutdowns due to transient faults
Solution Approach 2:
The circuit incorporates feedback mechanisms where the fault detection output feeds into a verification process that monitors whether the fault condition persists or has been cleared. This feedback loop allows the system to adjust its response based on the actual fault status, reducing false triggers
2Reliability
If a safety disconnect circuit immediately latches off power upon fault detection, then system protection is improved, but transient faults cause unnecessary shutdowns and increased system downtime
Solution Approach 1:
Before executing a permanent latch-off action, the circuit performs preliminary verification by attempting to clear the fault and checking whether the fault condition persists. This preliminary action distinguishes between transient and persistent faults, preventing unnecessary permanent shutdowns
Solution Approach 2:
The circuit transitions from a static immediate-latch design to a dynamic multi-stage response. The latch state is no longer determined instantaneously but evolves through verification stages, allowing the system to adapt its shutdown duration based on fault persistence
3Measurement precision
If additional verification components are added to reduce false faults, then accuracy of fault detection is improved, but device complexity and cost increase
Solution Approach 1:
The fault detection circuit performs multiple functions using the same components: initial fault detection, fault verification, and recovery monitoring. This multi-functionality reduces the need for separate dedicated components for each function, maintaining accuracy while limiting complexity growth
Solution Approach 2:
The circuit merges the fault detection logic with the latch control logic into an integrated verification process. By combining these functions in a unified control pathway, the circuit achieves improved fault detection accuracy without proportionally increasing overall circuit complexity
Data Source
AI summary
Described embodiments include a safety disconnect circuit having a logic circuit with first, second and third logic inputs and a logic output. A latch has a latch input coupled to the logic output, a latch power input, and a latch output. A counter has a counter input coupled to the logic output, and a counter output. A switch is coupled between a fault terminal and a ground terminal, and has a switch control terminal coupled to the latch output. A first voltage supply has a first supply input and a first supply output. A second voltage supply has a second supply input and a second supply output. A multiplexer has first and second multiplexer inputs that are coupled to first and second supply outputs, respectively. The multiplexer output is coupled to the latch power input. The multiplexer control terminal is coupled to the counter output.