SAG Nanowire Growth Using a Planarized Lattice-Transition Buffer

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Solution Overview

Problem

Conventional nanowire manufacturing processes, such as selective-area-growth (SAG), face challenges in reducing crystalline defects and maintaining surface smoothness due to lattice mismatch between substrates and nanowires, which affects the performance and functionality of nanowires, particularly in quantum computing applications.

Innovation Solution

A method involving the formation of a buffer layer with a planarized top surface, using chemical and mechanical polishing techniques to achieve a vertical roughness below 10 Å, and a patterned mask to grow nanowires, where the buffer layer's lattice constant transitions between that of the substrate and the nanowire, reducing defects and ensuring surface smoothness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If selective-area-growth (SAG) is used to grow nanowires directly on a substrate, then nanowire manufacturing is achieved, but crystalline defects such as dislocations and stacking faults occur due to lattice mismatch between the substrate and nanowires

Engineering Contradiction:

Improvenanowire manufacturingVSAvoidcrystalline quality

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

A buffer layer is introduced as an intermediary between the substrate and the nanowire. This buffer layer has a lattice constant that gradually transitions from the substrate lattice constant to the nanowire lattice constant, reducing the lattice mismatch and minimizing crystalline defects such as dislocations and stacking faults during nanowire growth.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The lattice constant of the buffer layer is designed to gradually change from the substrate lattice constant to the nanowire lattice constant. This gradual parameter change reduces the abrupt lattice mismatch, thereby reducing crystalline defects while maintaining ease of manufacture through SAG process.

Inventive Principle:

Principle #35Parameter changes

2Ease of manufacture

If nanowires are grown on a substrate with lattice mismatch, then nanowire formation is achieved, but surface smoothness is compromised affecting electron transport

Engineering Contradiction:

Improvenanowire formationVSAvoidsurface smoothness

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The buffer layer is formed in advance before nanowire growth, and its top surface is planarized to achieve smoothness. This preliminary action ensures that when nanowires are subsequently grown, they form on a smooth surface that enables consistent electron transport, while the buffer layer's lattice transition properties remain intact.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The buffer layer is divided into multiple discrete layers, each with a slightly different lattice constant that gradually transitions from the substrate to the nanowire lattice constant. This segmentation allows the lattice transition to occur progressively while maintaining surface smoothness at the top interface where nanowires grow.

Inventive Principle:

Principle #1Segmentation

3Manufacturing precision

If a buffer layer with lattice constant transition is introduced, then crystalline defects are reduced, but the manufacturing process complexity increases

Engineering Contradiction:

Improvecrystalline qualityVSAvoidprocess complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The buffer layer's lattice constant is designed to gradually change from the substrate lattice constant to the nanowire lattice constant. This gradual parameter change reduces the abrupt lattice mismatch, thereby reducing crystalline defects while maintaining ease of manufacture through SAG process.

Inventive Principle:

Principle #35Parameter changes

4Manufacturing precision

If the top surface of the buffer layer is planarized, then surface smoothness is improved for electron transport, but material is removed from the buffer layer

Engineering Contradiction:

Improvesurface smoothnessVSAvoidbuffer layer material

Core Design Contradiction:

Manufacturing precisionVSLoss of substance

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces crystalline defects and maintains surface smoothness, enhancing the quality and functionality of nanowires by providing a lattice constant transition and ensuring consistent electron transport.

Implementation Method 1

The buffer layer is configured to have a lattice constant between a lattice constant of the substrate and a lattice constant of the nanowire, so as to provide a transition between the lattice constant of the substrate and the lattice constant of the nanowire

Methodology Applied

Scientific EffectLattice constant transition:

Implementation Method 2

the sacrificial top portion of the intact buffer region is eliminated by a chemical and mechanical polishing (CMP) technique, which includes one or more of chemical etching, oxidizing, surfactant solutions, and mechanical polishing

Methodology Applied

Scientific EffectChemical etching:

Implementation Method 3

Methodology Applied

Scientific EffectMechanical polishing: Abrasion

Implementation Method 4

Conventional processes for manufacturing nanowires include selective-area-growth (SAG) wherein nanowires are selectively grown directly on a substrate through a patterned mask

Methodology Applied

Scientific EffectSelective area growth:

Data Source

PatentUS11929253B2SAG nanowire growth with a planarization process

Publication Date: 2024.03.12 MICROSOFT TECHNOLOGY LICENSING LLC

AI summary

The present disclosure relates to a method of manufacturing a nanowire structure. According to an exemplary process, a substrate is firstly provided. An intact buffer region is formed over the substrate, and a sacrificial top portion of the intact buffer region is eliminated to provide a buffer layer with a planarized top surface. Herein, the planarized top surface has a vertical roughness below 10 Å. Next, a patterned mask with an opening is formed over the buffer layer, such that a portion of the planarized top surface of the buffer layer is exposed. A nanowire is formed over the exposed portion of the planarized top surface of the buffer layer through the opening of the patterned mask. The buffer layer is configured to have a lattice constant that provides a transition between the lattice constant of the substrate and the lattice constant of the nanowire.