Self-Aligned Gate Endcap Contacts for Lower-Capacitance Fin Layouts
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Solution Overview
Problem
The scaling of multi-gate transistors in integrated circuits leads to challenges in lithographic processes, particularly in achieving precise patterning of gate and contact endcaps, resulting in increased capacitance, switching delays, and reduced frequencies due to the need for additional metal layers and complex mask patterning solutions.
Innovation Solution
The implementation of a self-aligned gate endcap (SAGE) architecture with a perpendicular grid of insulating material, where the intersection with gates or contacts provides all interconnect locations, eliminating the need for extra mask registration and allowing for the reduction of transistor layout area and capacitance by using disposable spacers to determine gate and contact overlap dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional multi-gate transistor fabrication processes are used, then device dimensions can be scaled down, but lithographic patterning precision deteriorates due to the complexity of gate and contact endcap patterning
Solution Approach 1:
The gate endcap structure is self-aligned to the contact endcap through the perpendicular grid of insulating material, eliminating the need for separate mask registration operations. The intersection of the perpendicular grid with gate or contact structures automatically defines the endcap locations, providing self-alignment that ensures precise patterning even as device dimensions scale down.
Solution Approach 2:
The patent introduces a perpendicular grid of insulating material that extends in a dimension perpendicular to the gate structure. This additional dimensional approach allows endcap alignment to be defined by the intersection of the grid with gate or contact structures, rather than relying solely on planar mask registration, thereby improving patterning precision.
2Manufacturing precision
If additional metal layers and complex mask patterning solutions are used to achieve precise endcap patterning, then manufacturing complexity increases, but capacitance and switching delays increase
Solution Approach 1:
The perpendicular grid of insulating material automatically defines endcap locations through its intersection with gate or contact structures, eliminating the need for complex mask patterning operations. This self-aligning mechanism simplifies the fabrication process while maintaining precise endcap patterning.
Solution Approach 2:
The patent extracts the alignment function from complex mask patterning operations and transfers it to the geometric intersection of the perpendicular grid with gate or contact structures. By removing the need for additional mask registration operations, the solution reduces manufacturing complexity while preserving patterning precision.
3Manufacturing precision
If additional mask operations are performed to ensure proper endcap alignment, then manufacturing time increases, but transistor layout area increases
Solution Approach 1:
The perpendicular grid structure provides self-alignment for endcaps, eliminating the need for additional mask operations. The intersection of the grid with gate or contact structures automatically defines precise endcap locations, maintaining alignment precision while reducing manufacturing steps and improving throughput.
4Reliability
If extra endcap length is added to account for mask mis-registration, then transistor layout area increases, but reliability decreases due to increased capacitance
Solution Approach 1:
The self-aligned endcap structure eliminates the need for extra endcap length to compensate for mask mis-registration. The perpendicular grid automatically positions endcaps with high precision, allowing the use of minimal endcap length while maintaining reliable device performance and reducing transistor layout area.
Solution Approach 2:
Instead of adding extra endcap length to compensate for potential alignment errors (conventional approach), the patent inverts the approach by using a self-aligning perpendicular grid that inherently provides precise alignment, allowing endcap length to be minimized while maintaining reliability.
Data Source
AI summary
Self-aligned gate endcap (SAGE) architectures having gate contacts, and methods of fabricating SAGE architectures having gate contacts, are described. In an example, an integrated circuit structure includes a gate structure over a semiconductor fin. A gate endcap isolation structure is laterally adjacent to and in contact with the gate structure. A trench contact structure is over the semiconductor fin, where the gate endcap isolation structure is laterally adjacent to and in contact with the trench contact structure. A local gate-to-contact interconnect is electrically connecting the gate structure to the trench contact structure.