SALELE Patterning Method for Tight Pitch Trenches

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Solution Overview

Problem

Current patterning methods in semiconductor fabrication, such as litho-etch and spacer-assisted techniques, face challenges in achieving aggressive critical dimensions with reduced sensitivity to process variability and edge placement errors, particularly in forming tight pitch patterns.

Innovation Solution

A patterning method involving a combination of two litho-etch processes and a spacer-assisted technique, referred to as SALELE, which uses multiple memorization layers and block mask layers to form interrupted trenches with improved alignment and separation, reducing sensitivity to process variability by employing sidewall spacer lines and two-tone blocks for enhanced etch masking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If spacer-assisted multiple patterning techniques (SADP/SAQP) are used to form sub-lithographic tight pitch patterns, then critical dimensions are reduced, but sensitivity to edge placement errors increases

Engineering Contradiction:
Improvecritical dimensionVSAvoidedge placement error sensitivity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent divides the patterning process into multiple discrete steps with distinct functions: first mandrel formation, second spacer deposition, third mandrel removal, and fourth second spacer formation. Each step is independently optimized and controlled, allowing precise adjustment of critical dimensions while reducing cumulative process variability and edge placement errors through staged fabrication

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by forming mandrels with specific geometries and compositions before spacer deposition, and by pre-defining the spacing requirements through the first spacer layer. These preliminary structures and parameters are established in advance to guide subsequent patterning steps, ensuring consistent critical dimensions and reduced sensitivity to placement variations

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If two litho-etch processes are combined to form alternating trench sets, then tight pitch patterns are achieved, but process complexity increases

Engineering Contradiction:
Improvepitch patternVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple litho-etch processes into a unified spacer-assisted workflow where a single lithography step defines mandrels, and subsequent spacer depositions and etchbacks collectively form both sets of trenches. This consolidation reduces the number of independent lithography alignments required while achieving the same tight pitch pattern result

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs self-aligned spacer formation where the spacer structures automatically position themselves relative to the mandrels through conformal deposition, eliminating the need for separate alignment operations. The spacer width is self-defined by deposition thickness control rather than lithographic patterning, reducing process complexity and improving pitch consistency

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11476155B2Patterning method
Publication Date: 2022.10.18 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US11476155B2 patent drawing
  • US11476155B2 patent drawing
  • US11476155B2 patent drawing

AI summary

A method that provides patterning of an underlying layer to form a first set of trenches and a second set of trenches in the underlying layer is based on a combination of two litho-etch (LE) patterning processes supplemented with a spacer-assisted (SA) technique. The method uses one or more first upper blocks formed by a tone-inversion approach, an upper memorization layer allowing first memorizing upper trenches, and then second upper blocks, and a lower memorization layer allowing first memorizing first lower trenches and one or more first lower blocks, and then second lower trenches and one or more second lower blocks.