Salicide Layer Reduces Parasitic Interference in Semiconductor Devices
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Solution Overview
Problem
Conventional semiconductor devices experience interference from parasitic electricity, such as parasitic resistance, capacitance, and inductance, generated by passive components, which affects circuit performance.
Innovation Solution
A semiconductor device with a salicide layer is developed, comprising a semiconductor substrate, a polysilicon layer, a salicide blockage layer, and a first salicide layer formed by reacting a second polysilicon layer with a titanium, nickel, or copper reaction layer, which isolates the passive component from the circuit, reducing parasitic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a passive component is formed on the semiconductor substrate, then the device functionality is improved, but parasitic electricity (resistance, capacitance, inductance) is generated which interferes with the circuit
Solution Approach 1:
A salicide layer is introduced as an intermediary between the passive component and the circuit. This salicide layer acts as a mediator that reduces parasitic electricity generation while maintaining the passive component's functionality, thereby resolving the contradiction between device functionality and parasitic interference
Solution Approach 2:
The invention converts the harmful effect of parasitic electricity into a benefit by forming a salicide layer that specifically targets and reduces these parasitic elements. The salicide layer transforms the problematic interaction between passive components and circuits into a controlled interface with minimized parasitic effects
2Object-generated harmful factors
If a salicide layer is formed to reduce parasitic interference, then parasitic resistance and distortion are reduced, but the device structure and manufacturing process become more complex
Solution Approach 1:
The salicide layer formation process is merged with existing semiconductor manufacturing steps. The salicide layer is formed using standard deposition and annealing processes that are already part of the fabrication flow, thereby reducing parasitic resistance without significantly increasing overall device complexity
Solution Approach 2:
The invention changes the material and structural parameters of the interface between passive components and circuits by introducing the salicide layer. This parameter change (adding a specific material layer with controlled thickness and composition) effectively reduces parasitic resistance while maintaining manageable device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The salicide layer effectively reduces parasitic interference, specifically lowering total harmonic distortion by 10 dB, and allows for controlled voltage application to maintain a constant voltage difference, thereby minimizing adverse effects on the circuit.
Implementation Method 1
a second polysilicon layer is reacted with the reaction layer to form a first salicide layer
Data Source
AI summary
A semiconductor device includes a semiconductor substrate and a passive component. The passive component is formed on the semiconductor substrate and includes a first polysilicon (poly) layer, a salicide blockage (SAB) layer and a first salicide layer. The SAB layer is formed on the first poly layer. The first salicide layer is formed on the SAB layer.