Self-Assembled Monolayer Via Fill for Void-Free Damascene Interconnects
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Solution Overview
Problem
Current gap fill processing in high aspect ratio trenches and vias for metallization in integrated circuits results in voids and reliability issues, hindering the development of smaller transistor sizes and increased density due to limitations in metallization fill materials and processing conditions.
Innovation Solution
The use of self-assembled monolayers to selectively deposit metal layers at the bottom of vias, reducing the aspect ratio needed for subsequent gap fill, allowing full metal fill without voids by increasing the aspect ratio through a two-step metal deposition process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If conventional gap fill processing is used for high aspect ratio vias, then the via fill height can be achieved, but voids form in the fill metal causing reliability issues
Solution Approach 1:
A self-assembled monolayer is deposited on the via sidewalls before the metal gap fill process. This preliminary action modifies the surface properties of the sidewalls to control metal deposition, ensuring complete fill without voids even in high aspect ratio vias by preventing metal from adhering to the sidewalls during the gap fill process.
2Productivity
If transistor size is reduced to increase density, then integration density improves, but metallization gap fill becomes more challenging
Solution Approach 1:
The self-assembled monolayer provides localized modification of the via sidewall surface properties. By selectively depositing the monolayer only on the sidewalls and not on the via bottom, the process creates different surface characteristics in different locations, enabling controlled metal deposition that works for smaller dimensions while maintaining manufacturing feasibility.
3Manufacturing precision
If self-assembled monolayer is deposited on via sidewalls, then void-free metal fill is achieved, but the monolayer must be selectively removed
Solution Approach 1:
The self-assembled monolayer acts as a temporary intermediary layer that facilitates the gap fill process. It is deposited selectively on sidewalls, enables void-free metal deposition, and then removed in a subsequent step. This intermediary approach simplifies the overall metal fill quality while the additional removal step is offset by eliminating void-related rework.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-quality, reliable interconnect metallization with reduced via resistance and increased aspect ratios, facilitating smaller transistor sizes and improved integrated circuit performance.
Implementation Method 1
a self-assembled monolayer is selectively formed on the sidewalls of the interlayer dielectric material in the opening
Implementation Method 2
The molecules of the self-assembled monolayer are selected to only passivate the interlayer dielectric material and not a top surface of the metallization feature
Data Source
AI summary
Metallization interconnect structures, integrated circuit devices, and methods related to high aspect ratio interconnects are discussed. A self assembled monolayer is selectively formed on interlayer dielectric sidewalls of an opening that exposes an underlying metallization structure. A first metal is formed on the underlying metallization structure and within only a bottom portion of the self assembled monolayer. The exposed portion of the self assembled monolayer is removed and a second metal is formed over the first metal.