Same-Level Orthogonal Metal Lines for Compact Interconnect Routing
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Solution Overview
Problem
Existing semiconductor interconnect structures require multiple metal levels for signal and power transmission, leading to increased height and thermal resistance, as well as inefficiencies in heat dissipation and power supply noise.
Innovation Solution
The integration of orthogonal metal lines with an insulating liner at the same metal level, where one set of metal lines is embedded within or encapsulated by another, reducing the need for multiple metal levels and enhancing decoupling capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple metal levels are used for signal and power transmission, then the interconnect structure can provide sufficient routing capacity, but the height of the interconnect stack increases and thermal resistance increases
Solution Approach 1:
The patent embeds one set of metal lines within another set of metal lines at the same metal level. Specifically, a first set of metal lines is formed, then a second set of metal lines is embedded within the first set at cross points, creating a nested configuration that allows multiple routing paths in a compact vertical space without increasing overall stack height
Solution Approach 2:
The patent transitions from traditional vertical stacking of metal levels to a horizontal embedding approach where metal lines are placed at the same level but in different spatial dimensions (one set embedded within another), effectively utilizing the planar dimension to increase routing capacity without vertical expansion
2Adaptability or versatility
If multiple metal levels are used for signal and power transmission, then the interconnect structure can provide sufficient routing capacity, but thermal resistance increases
Solution Approach 1:
The nested embedding of metal lines within the same metal level creates shorter current paths and reduces the vertical distance for heat dissipation, thereby lowering thermal resistance while maintaining adequate routing capacity through the embedded configuration
Solution Approach 2:
The patent merges signal and power transmission functions into the same metal level by embedding different metal line sets together, which consolidates the thermal path and improves heat dissipation efficiency compared to separated multi-level configurations
3Length of stationary object
If orthogonal metal lines are embedded at the same metal level, then the interconnect stack becomes more compact with reduced thermal resistance, but the manufacturing complexity increases
Solution Approach 1:
The first set of metal lines is formed in advance before the second set is embedded. This preliminary formation allows subsequent embedding processes to work with a pre-established structure, simplifying the overall manufacturing sequence despite the innovative embedding approach
Solution Approach 2:
The embedding process is designed to fit the second set of metal lines into the structure created by the first set, creating a nested configuration that achieves compactness while following a systematic manufacturing approach that manages complexity
Data Source
AI summary
A semiconductor interconnect structure and formation thereof. The semiconductor interconnect structure includes a first set of metal lines running along a first orientation, and a second set of metal lines having an insulating liner and running along a second orientation. The second set of metal lines are embedded within the first set of metal lines at respective cross points between the first and second set of metal lines, such that the second set of metal lines are located in a same metal level as the first set of metal lines.